Chiplet Explained

A chiplet^{[1] [2] [3] [4]} is a tiny integrated circuit (IC) that contains a well-defined subset of functionality. It is designed to be combined with other chiplets on an interposer in a single package to create a complex component such as a computer processor. Each chiplet in a computer processor provides only a portion of the processor's total functionality. A set of chiplets can be implemented in a mix-and-match "Lego-like" assembly. This provides several advantages over a traditional system on chip (SoC) which is monolithic as it comprises a single silicon die:

• Reusable IP (intellectual property):^[5] the same chiplet can be used in many different devices
• Heterogeneous integration:^[6] chiplets can be fabricated with different processes, materials, and nodes, each optimized for its particular function
• Known good die:^[7] chiplets can be tested before assembly, improving the yield of the final device.

Multiple chiplets working together in a single integrated circuit may be called a multi-chip module, hybrid IC, 2.5D IC, or an advanced package.

Chiplets may be connected with standards such as UCIe, bunch of wires (BoW), AIB (Advanced Interface Bus), OpenHBI (Open High Bandwidth Interface), and OIF (Optical Internetworking Forum) XSR (Extra Short Reach).^{[8] [9]} Chiplets not designed by the same company must be designed with interoperability in mind.^[10]

The term was coined by University of California, Berkeley professor John Wawrzynek as a component of the RAMP Project (research accelerator for multiple processors) in 2006 ^{[11] [12]} extension for the Department of Energy.

Common examples include:

• AMD Ryzen based on Zen 2 and later architecture (except APUs^[13])
• NVidia H100, and later
• Intel Sapphire Rapids / Meteor Lake / Arrow Lake, and later

See also

• UCIe

Further reading

• News: Clark . Don . 11 May 2023 . U.S. Focuses on Invigorating 'Chiplets' to Stay Cutting-Edge in Tech . The New York Times.

Notes and References

1. Web site: What Is a Chiplet? . Brookes . 25 July 2021 . How-To Geek . 28 December 2021.
2. Web site: Chiplet . WikiChip . 28 December 2021.
3. AnySilicon "The Ultimate Guide to Chiplets" Retrieved 23 December 2024
4. Don Scansen, EE Times "Chiplets: A Short History Retrieved 5 December 2022
5. Web site: Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) . Keeler . DARPA . 28 December 2021.
6. Web site: Heterogeneous Integration and the Evolution of IC Packaging . Kenyon . 6 April 2021 . EE Times Europe . 28 December 2021.
7. Book: https://link.springer.com/chapter/10.1007/978-1-4615-1389-6_4 . 7 October 2022 . SpringerLink. 2001 . 10.1007/978-1-4615-1389-6_4 . Bertin . Claude L. . Su . Lo-Soun . Van Horn . Jody . Area Array Interconnection Handbook . Known Good die (KGD) . 149–200 . 978-1-4613-5529-8 .
8. Web site: Waiting for Chiplet Standards . 25 March 2021 .
9. Web site: Is UCIe Really Universal? . 22 November 2022 .
10. Web site: UCIe Goes Back to the Drawing Board . 22 February 2024 .
11. Book: Patterson, D.A. . 2006 IEEE International Symposium on Performance Analysis of Systems and Software . RAMP: Research accelerator for multiple processors - a community vision for a shared experimental parallel HW/SW platform . March 2006 . 1– . 10.1109/ISPASS.2006.1620784. 1-4244-0186-0 .
12. Wawrzynek . John . 2015-05-01 . Accelerating Science Driven System Design With RAMP . 1186854 . English . UCB. 10.2172/1186854 . subscription .
13. Web site: crmaris . 2024-01-29 . AMD Ryzen 7 8700G APU Review: Performance, Thermals & Power Analysis . 2025-12-24 . Hardware Busters . en-US.