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Remove Native Client support - #133661
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Remove Native Client support#133661
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@llvm/pr-subscribers-backend-mips @llvm/pr-subscribers-backend-arm Author: Brad Smith (brad0) ChangesWorking on preparing a patch to remove the Native Client support now that it is finally reaching end of life. Patch is 156.94 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/133661.diff 97 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 497d68779b92b..3c7f3552e4f49 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -336,10 +336,6 @@ class TargetInfo : public TransferrableTargetInfo,
/// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
AArch64ABIBuiltinVaList,
- /// __builtin_va_list as defined by the PNaCl ABI:
- /// http://www.chromium.org/nativeclient/pnacl/bitcode-abi#TOC-Machine-Types
- PNaClABIBuiltinVaList,
-
/// __builtin_va_list as defined by the Power ABI:
/// https://www.power.org
/// /resources/downloads/Power-Arch-32-bit-ABI-supp-1.0-Embedded.pdf
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c9d1bea4c623a..1a63646ab534e 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9740,14 +9740,6 @@ CreateX86_64ABIBuiltinVaListDecl(const ASTContext *Context) {
return Context->buildImplicitTypedef(VaListTagArrayType, "__builtin_va_list");
}
-static TypedefDecl *CreatePNaClABIBuiltinVaListDecl(const ASTContext *Context) {
- // typedef int __builtin_va_list[4];
- llvm::APInt Size(Context->getTypeSize(Context->getSizeType()), 4);
- QualType IntArrayType = Context->getConstantArrayType(
- Context->IntTy, Size, nullptr, ArraySizeModifier::Normal, 0);
- return Context->buildImplicitTypedef(IntArrayType, "__builtin_va_list");
-}
-
static TypedefDecl *
CreateAAPCSABIBuiltinVaListDecl(const ASTContext *Context) {
// struct __va_list
@@ -9945,8 +9937,6 @@ static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
return CreatePowerABIBuiltinVaListDecl(Context);
case TargetInfo::X86_64ABIBuiltinVaList:
return CreateX86_64ABIBuiltinVaListDecl(Context);
- case TargetInfo::PNaClABIBuiltinVaList:
- return CreatePNaClABIBuiltinVaListDecl(Context);
case TargetInfo::AAPCSABIBuiltinVaList:
return CreateAAPCSABIBuiltinVaListDecl(Context);
case TargetInfo::SystemZBuiltinVaList:
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index 331dfbb3f4b67..bb96e3736941f 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -109,7 +109,6 @@ add_clang_library(clangBasic
Targets/Mips.cpp
Targets/NVPTX.cpp
Targets/OSTargets.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index c6d228fe98100..d38c2edc7ebf6 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -29,7 +29,6 @@
#include "Targets/Mips.h"
#include "Targets/NVPTX.h"
#include "Targets/OSTargets.h"
-#include "Targets/PNaCl.h"
#include "Targets/PPC.h"
#include "Targets/RISCV.h"
#include "Targets/SPIR.h"
@@ -225,8 +224,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<RTEMSTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<ARMleTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::Cygnus:
@@ -257,8 +254,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<NetBSDTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
default:
return std::make_unique<ARMbeTargetInfo>(Triple, Opts);
}
@@ -301,9 +296,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<FreeBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
return std::make_unique<NetBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<NaClMips32TargetInfo>>(Triple,
- Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::GNU:
@@ -585,8 +577,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<HaikuX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSX86_32TargetInfo>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_32TargetInfo>>(Triple, Opts);
case llvm::Triple::ELFIAMCU:
return std::make_unique<MCUX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::Hurd:
@@ -646,8 +636,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
}
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<X86_64TargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS4:
return std::make_unique<PS4OSTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS5:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ca2c1ffbb0eb7..518e4ec82ca77 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -58,9 +58,6 @@ void ARMTargetInfo::setABIAAPCS() {
"-a:0:32"
"-n32"
"-S64");
- } else if (T.isOSNaCl()) {
- assert(!BigEndian && "NaCl on ARM does not support big endian");
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S128");
} else {
resetDataLayout(BigEndian
? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h
index a88c851797aab..dbff025265ee6 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -842,53 +842,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsTargetInfo : public OSTargetInfo<Target> {
}
};
-template <typename Target>
-class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
-protected:
- void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
- MacroBuilder &Builder) const override {
- if (Opts.POSIXThreads)
- Builder.defineMacro("_REENTRANT");
- if (Opts.CPlusPlus)
- Builder.defineMacro("_GNU_SOURCE");
-
- DefineStd(Builder, "unix", Opts);
- Builder.defineMacro("__native_client__");
- }
-
-public:
- NaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : OSTargetInfo<Target>(Triple, Opts) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->LongLongWidth = 64;
- this->LongLongAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- // RegParmMax is inherited from the underlying architecture.
- this->LongDoubleFormat = &llvm::APFloat::IEEEdouble();
- if (Triple.getArch() == llvm::Triple::arm) {
- // Handled in ARM's setABI().
- } else if (Triple.getArch() == llvm::Triple::x86) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32-S128");
- } else if (Triple.getArch() == llvm::Triple::x86_64) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32:64-S128");
- } else if (Triple.getArch() == llvm::Triple::mipsel) {
- // Handled on mips' setDataLayout.
- }
- }
-};
-
// Fuchsia Target
template <typename Target>
class LLVM_LIBRARY_VISIBILITY FuchsiaTargetInfo : public OSTargetInfo<Target> {
diff --git a/clang/lib/Basic/Targets/PNaCl.cpp b/clang/lib/Basic/Targets/PNaCl.cpp
deleted file mode 100644
index c4adfbefb9c73..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-//===--- PNaCl.cpp - Implement PNaCl target feature support ---------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PNaCl.h"
-#include "clang/Basic/MacroBuilder.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-ArrayRef<const char *> PNaClTargetInfo::getGCCRegNames() const { return {}; }
-
-ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
- return {};
-}
-
-void PNaClTargetInfo::getArchDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const {
- Builder.defineMacro("__le32__");
- Builder.defineMacro("__pnacl__");
-}
diff --git a/clang/lib/Basic/Targets/PNaCl.h b/clang/lib/Basic/Targets/PNaCl.h
deleted file mode 100644
index d162776b5a0d6..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.h
+++ /dev/null
@@ -1,90 +0,0 @@
-//===--- PNaCl.h - Declare PNaCl target feature support ---------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-
-#include "Mips.h"
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/TargetParser/Triple.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY PNaClTargetInfo : public TargetInfo {
-public:
- PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : TargetInfo(Triple) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- this->RegParmMax = 0; // Disallow regparm
- }
-
- void getArchDefines(const LangOptions &Opts, MacroBuilder &Builder) const;
-
- void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override {
- getArchDefines(Opts, Builder);
- }
-
- bool hasFeature(StringRef Feature) const override {
- return Feature == "pnacl";
- }
-
- llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override {
- return {};
- }
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-
- ArrayRef<const char *> getGCCRegNames() const override;
-
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
-
- bool validateAsmConstraint(const char *&Name,
- TargetInfo::ConstraintInfo &Info) const override {
- return false;
- }
-
- std::string_view getClobbers() const override { return ""; }
-
- bool hasBitIntType() const override { return true; }
-};
-
-// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
-class LLVM_LIBRARY_VISIBILITY NaClMips32TargetInfo : public MipsTargetInfo {
-public:
- NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : MipsTargetInfo(Triple, Opts) {}
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-};
-} // namespace targets
-} // namespace clang
-
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
diff --git a/clang/lib/CodeGen/CMakeLists.txt b/clang/lib/CodeGen/CMakeLists.txt
index ebe2fbd7db295..51769fe895ee3 100644
--- a/clang/lib/CodeGen/CMakeLists.txt
+++ b/clang/lib/CodeGen/CMakeLists.txt
@@ -142,7 +142,6 @@ add_clang_library(clangCodeGen
Targets/MSP430.cpp
Targets/Mips.cpp
Targets/NVPTX.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 5dbd50be6ca1a..2041c5fd0f68a 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -118,9 +118,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createM68kTargetCodeGenInfo(CGM);
case llvm::Triple::mips:
case llvm::Triple::mipsel:
- if (Triple.getOS() == llvm::Triple::NaCl)
- return createPNaClTargetCodeGenInfo(CGM);
- else if (Triple.getOS() == llvm::Triple::Win32)
+ if (Triple.getOS() == llvm::Triple::Win32)
return createWindowsMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
return createMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index 5df19fbef1e5b..44dab29b3ea86 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+++ b/clang/lib/CodeGen/TargetInfo.h
@@ -533,9 +533,6 @@ createMSP430TargetCodeGenInfo(CodeGenModule &CGM);
std::unique_ptr<TargetCodeGenInfo>
createNVPTXTargetCodeGenInfo(CodeGenModule &CGM);
-std::unique_ptr<TargetCodeGenInfo>
-createPNaClTargetCodeGenInfo(CodeGenModule &CGM);
-
enum class PPC64_SVR4_ABIKind {
ELFv1 = 0,
ELFv2,
diff --git a/clang/lib/CodeGen/Targets/PNaCl.cpp b/clang/lib/CodeGen/Targets/PNaCl.cpp
deleted file mode 100644
index 358010785850e..0000000000000
--- a/clang/lib/CodeGen/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,114 +0,0 @@
-//===- PNaCl.cpp ----------------------------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "ABIInfoImpl.h"
-#include "TargetInfo.h"
-
-using namespace clang;
-using namespace clang::CodeGen;
-
-//===----------------------------------------------------------------------===//
-// le32/PNaCl bitcode ABI Implementation
-//
-// This is a simplified version of the x86_32 ABI. Arguments and return values
-// are always passed on the stack.
-//===----------------------------------------------------------------------===//
-
-class PNaClABIInfo : public ABIInfo {
- public:
- PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
-
- ABIArgInfo classifyReturnType(QualType RetTy) const;
- ABIArgInfo classifyArgumentType(QualType RetTy) const;
-
- void computeInfo(CGFunctionInfo &FI) const override;
- RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
- AggValueSlot Slot) const override;
-};
-
-class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
- public:
- PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
- : TargetCodeGenInfo(std::make_unique<PNaClABIInfo>(CGT)) {}
-};
-
-void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
- if (!getCXXABI().classifyReturnType(FI))
- FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
-
- for (auto &I : FI.arguments())
- I.info = classifyArgumentType(I.type);
-}
-
-RValue PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
- QualType Ty, AggValueSlot Slot) const {
- // The PNaCL ABI is a bit odd, in that varargs don't use normal
- // function classification. Structs get passed directly for varargs
- // functions, through a rewriting transform in
- // pnacl-llvm/lib/Transforms/NaCl/ExpandVarArgs.cpp, which allows
- // this target to actually support a va_arg instructions with an
- // aggregate type, unlike other targets.
- return CGF.EmitLoadOfAnyValue(
- CGF.MakeAddrLValue(
- EmitVAArgInstr(CGF, VAListAddr, Ty, ABIArgInfo::getDirect()), Ty),
- Slot);
-}
-
-/// Classify argument of given type \p Ty.
-ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
- if (isAggregateTypeForABI(Ty)) {
- if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
- RAA == CGCXXABI::RAA_DirectInMemory);
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
- // Treat an enum type as its underlying type.
- Ty = EnumTy->getDecl()->getIntegerType();
- } else if (Ty->isFloatingType()) {
- // Floating-point types don't go inreg.
- return ABIArgInfo::getDirect();
- } else if (const auto *EIT = Ty->getAs<BitIntType>()) {
- // Treat bit-precise integers as integers if <= 64, otherwise pass
- // indirectly.
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
- : ABIArgInfo::getDirect());
-}
-
-ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
- if (RetTy->isVoidType())
- return ABIArgInfo::getIgnore();
-
- // In the PNaCl ABI we always return records/structures on the stack.
- if (isAggregateTypeForABI(RetTy))
- return getNaturalAlignIndirect(RetTy, getDataLayout().getAllocaAddrSpace());
-
- // Treat bit-precise integers as integers if <= 64, otherwise pass indirectly.
- if (const auto *EIT = RetTy->getAs<BitIntType>()) {
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(RetTy,
- getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- // Treat an enum type as its underlying type.
- if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
- RetTy = EnumTy->getDecl()->getIntegerType();
-
- return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
- : ABIArgInfo::getDirect());
-}
-
-std::unique_ptr<TargetCodeGenInfo>
-CodeGen::createPNaClTargetCodeGenInfo(CodeGenModule &CGM) {
- return std::make_unique<PNaClTargetCodeGenInfo>(CGM.getTypes());
-}
diff --git a/clang/lib/CodeGen/Targets/X86.cpp b/clang/lib/CodeGen/Targets/X86.cpp
index b36a6e1396653..606e5ce780bd0 100644
--- a/clang/lib/CodeGen/Targets/X86.cpp
+++ b/clang/lib/CodeGen/Targets/X86.cpp
@@ -2573,8 +2573,7 @@ GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
if (HiStart != 8) {
// There are usually two sorts of types the ABI generation code can produce
// for the low part of a pair that aren't 8 bytes in size: half, float or
- // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
- // NaCl).
+ // i8/i16/i32. This can also include pointers when they are 32-bit (X32).
// Promote these to a larger type.
if (Lo->isHalfTy() || Lo->isFloatTy())
Lo = llvm::Type::getDoubleTy(Lo->getContext());
diff --git a/clang/lib/Driver/CMakeLists.txt b/clang/lib/Driver/CMakeLists.txt
index 5bdb6614389cf..306d6f689ef0a 100644
--- a/clang/lib/Driver/CMakeLists.txt
+++ b/clang/lib/Driver/CMakeLists.txt
@@ -69,7 +69,6 @@ add_clang_library(clangDriver
ToolChains/MinGW.cpp
ToolChains/MSP430.cpp
ToolChains/MSVC.cpp
- ToolChains/NaCl.cpp
ToolChains/NetBSD.cpp
ToolChains/OHOS...
[truncated]
|
Member
|
@llvm/pr-subscribers-llvm-binary-utilities Author: Brad Smith (brad0) ChangesWorking on preparing a patch to remove the Native Client support now that it is finally reaching end of life. Patch is 156.94 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/133661.diff 97 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 497d68779b92b..3c7f3552e4f49 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -336,10 +336,6 @@ class TargetInfo : public TransferrableTargetInfo,
/// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
AArch64ABIBuiltinVaList,
- /// __builtin_va_list as defined by the PNaCl ABI:
- /// http://www.chromium.org/nativeclient/pnacl/bitcode-abi#TOC-Machine-Types
- PNaClABIBuiltinVaList,
-
/// __builtin_va_list as defined by the Power ABI:
/// https://www.power.org
/// /resources/downloads/Power-Arch-32-bit-ABI-supp-1.0-Embedded.pdf
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c9d1bea4c623a..1a63646ab534e 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9740,14 +9740,6 @@ CreateX86_64ABIBuiltinVaListDecl(const ASTContext *Context) {
return Context->buildImplicitTypedef(VaListTagArrayType, "__builtin_va_list");
}
-static TypedefDecl *CreatePNaClABIBuiltinVaListDecl(const ASTContext *Context) {
- // typedef int __builtin_va_list[4];
- llvm::APInt Size(Context->getTypeSize(Context->getSizeType()), 4);
- QualType IntArrayType = Context->getConstantArrayType(
- Context->IntTy, Size, nullptr, ArraySizeModifier::Normal, 0);
- return Context->buildImplicitTypedef(IntArrayType, "__builtin_va_list");
-}
-
static TypedefDecl *
CreateAAPCSABIBuiltinVaListDecl(const ASTContext *Context) {
// struct __va_list
@@ -9945,8 +9937,6 @@ static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
return CreatePowerABIBuiltinVaListDecl(Context);
case TargetInfo::X86_64ABIBuiltinVaList:
return CreateX86_64ABIBuiltinVaListDecl(Context);
- case TargetInfo::PNaClABIBuiltinVaList:
- return CreatePNaClABIBuiltinVaListDecl(Context);
case TargetInfo::AAPCSABIBuiltinVaList:
return CreateAAPCSABIBuiltinVaListDecl(Context);
case TargetInfo::SystemZBuiltinVaList:
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index 331dfbb3f4b67..bb96e3736941f 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -109,7 +109,6 @@ add_clang_library(clangBasic
Targets/Mips.cpp
Targets/NVPTX.cpp
Targets/OSTargets.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index c6d228fe98100..d38c2edc7ebf6 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -29,7 +29,6 @@
#include "Targets/Mips.h"
#include "Targets/NVPTX.h"
#include "Targets/OSTargets.h"
-#include "Targets/PNaCl.h"
#include "Targets/PPC.h"
#include "Targets/RISCV.h"
#include "Targets/SPIR.h"
@@ -225,8 +224,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<RTEMSTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<ARMleTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::Cygnus:
@@ -257,8 +254,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<NetBSDTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
default:
return std::make_unique<ARMbeTargetInfo>(Triple, Opts);
}
@@ -301,9 +296,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<FreeBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
return std::make_unique<NetBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<NaClMips32TargetInfo>>(Triple,
- Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::GNU:
@@ -585,8 +577,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<HaikuX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSX86_32TargetInfo>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_32TargetInfo>>(Triple, Opts);
case llvm::Triple::ELFIAMCU:
return std::make_unique<MCUX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::Hurd:
@@ -646,8 +636,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
}
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<X86_64TargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS4:
return std::make_unique<PS4OSTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS5:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ca2c1ffbb0eb7..518e4ec82ca77 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -58,9 +58,6 @@ void ARMTargetInfo::setABIAAPCS() {
"-a:0:32"
"-n32"
"-S64");
- } else if (T.isOSNaCl()) {
- assert(!BigEndian && "NaCl on ARM does not support big endian");
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S128");
} else {
resetDataLayout(BigEndian
? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h
index a88c851797aab..dbff025265ee6 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -842,53 +842,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsTargetInfo : public OSTargetInfo<Target> {
}
};
-template <typename Target>
-class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
-protected:
- void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
- MacroBuilder &Builder) const override {
- if (Opts.POSIXThreads)
- Builder.defineMacro("_REENTRANT");
- if (Opts.CPlusPlus)
- Builder.defineMacro("_GNU_SOURCE");
-
- DefineStd(Builder, "unix", Opts);
- Builder.defineMacro("__native_client__");
- }
-
-public:
- NaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : OSTargetInfo<Target>(Triple, Opts) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->LongLongWidth = 64;
- this->LongLongAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- // RegParmMax is inherited from the underlying architecture.
- this->LongDoubleFormat = &llvm::APFloat::IEEEdouble();
- if (Triple.getArch() == llvm::Triple::arm) {
- // Handled in ARM's setABI().
- } else if (Triple.getArch() == llvm::Triple::x86) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32-S128");
- } else if (Triple.getArch() == llvm::Triple::x86_64) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32:64-S128");
- } else if (Triple.getArch() == llvm::Triple::mipsel) {
- // Handled on mips' setDataLayout.
- }
- }
-};
-
// Fuchsia Target
template <typename Target>
class LLVM_LIBRARY_VISIBILITY FuchsiaTargetInfo : public OSTargetInfo<Target> {
diff --git a/clang/lib/Basic/Targets/PNaCl.cpp b/clang/lib/Basic/Targets/PNaCl.cpp
deleted file mode 100644
index c4adfbefb9c73..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-//===--- PNaCl.cpp - Implement PNaCl target feature support ---------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PNaCl.h"
-#include "clang/Basic/MacroBuilder.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-ArrayRef<const char *> PNaClTargetInfo::getGCCRegNames() const { return {}; }
-
-ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
- return {};
-}
-
-void PNaClTargetInfo::getArchDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const {
- Builder.defineMacro("__le32__");
- Builder.defineMacro("__pnacl__");
-}
diff --git a/clang/lib/Basic/Targets/PNaCl.h b/clang/lib/Basic/Targets/PNaCl.h
deleted file mode 100644
index d162776b5a0d6..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.h
+++ /dev/null
@@ -1,90 +0,0 @@
-//===--- PNaCl.h - Declare PNaCl target feature support ---------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-
-#include "Mips.h"
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/TargetParser/Triple.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY PNaClTargetInfo : public TargetInfo {
-public:
- PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : TargetInfo(Triple) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- this->RegParmMax = 0; // Disallow regparm
- }
-
- void getArchDefines(const LangOptions &Opts, MacroBuilder &Builder) const;
-
- void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override {
- getArchDefines(Opts, Builder);
- }
-
- bool hasFeature(StringRef Feature) const override {
- return Feature == "pnacl";
- }
-
- llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override {
- return {};
- }
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-
- ArrayRef<const char *> getGCCRegNames() const override;
-
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
-
- bool validateAsmConstraint(const char *&Name,
- TargetInfo::ConstraintInfo &Info) const override {
- return false;
- }
-
- std::string_view getClobbers() const override { return ""; }
-
- bool hasBitIntType() const override { return true; }
-};
-
-// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
-class LLVM_LIBRARY_VISIBILITY NaClMips32TargetInfo : public MipsTargetInfo {
-public:
- NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : MipsTargetInfo(Triple, Opts) {}
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-};
-} // namespace targets
-} // namespace clang
-
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
diff --git a/clang/lib/CodeGen/CMakeLists.txt b/clang/lib/CodeGen/CMakeLists.txt
index ebe2fbd7db295..51769fe895ee3 100644
--- a/clang/lib/CodeGen/CMakeLists.txt
+++ b/clang/lib/CodeGen/CMakeLists.txt
@@ -142,7 +142,6 @@ add_clang_library(clangCodeGen
Targets/MSP430.cpp
Targets/Mips.cpp
Targets/NVPTX.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 5dbd50be6ca1a..2041c5fd0f68a 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -118,9 +118,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createM68kTargetCodeGenInfo(CGM);
case llvm::Triple::mips:
case llvm::Triple::mipsel:
- if (Triple.getOS() == llvm::Triple::NaCl)
- return createPNaClTargetCodeGenInfo(CGM);
- else if (Triple.getOS() == llvm::Triple::Win32)
+ if (Triple.getOS() == llvm::Triple::Win32)
return createWindowsMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
return createMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index 5df19fbef1e5b..44dab29b3ea86 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+++ b/clang/lib/CodeGen/TargetInfo.h
@@ -533,9 +533,6 @@ createMSP430TargetCodeGenInfo(CodeGenModule &CGM);
std::unique_ptr<TargetCodeGenInfo>
createNVPTXTargetCodeGenInfo(CodeGenModule &CGM);
-std::unique_ptr<TargetCodeGenInfo>
-createPNaClTargetCodeGenInfo(CodeGenModule &CGM);
-
enum class PPC64_SVR4_ABIKind {
ELFv1 = 0,
ELFv2,
diff --git a/clang/lib/CodeGen/Targets/PNaCl.cpp b/clang/lib/CodeGen/Targets/PNaCl.cpp
deleted file mode 100644
index 358010785850e..0000000000000
--- a/clang/lib/CodeGen/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,114 +0,0 @@
-//===- PNaCl.cpp ----------------------------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "ABIInfoImpl.h"
-#include "TargetInfo.h"
-
-using namespace clang;
-using namespace clang::CodeGen;
-
-//===----------------------------------------------------------------------===//
-// le32/PNaCl bitcode ABI Implementation
-//
-// This is a simplified version of the x86_32 ABI. Arguments and return values
-// are always passed on the stack.
-//===----------------------------------------------------------------------===//
-
-class PNaClABIInfo : public ABIInfo {
- public:
- PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
-
- ABIArgInfo classifyReturnType(QualType RetTy) const;
- ABIArgInfo classifyArgumentType(QualType RetTy) const;
-
- void computeInfo(CGFunctionInfo &FI) const override;
- RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
- AggValueSlot Slot) const override;
-};
-
-class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
- public:
- PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
- : TargetCodeGenInfo(std::make_unique<PNaClABIInfo>(CGT)) {}
-};
-
-void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
- if (!getCXXABI().classifyReturnType(FI))
- FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
-
- for (auto &I : FI.arguments())
- I.info = classifyArgumentType(I.type);
-}
-
-RValue PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
- QualType Ty, AggValueSlot Slot) const {
- // The PNaCL ABI is a bit odd, in that varargs don't use normal
- // function classification. Structs get passed directly for varargs
- // functions, through a rewriting transform in
- // pnacl-llvm/lib/Transforms/NaCl/ExpandVarArgs.cpp, which allows
- // this target to actually support a va_arg instructions with an
- // aggregate type, unlike other targets.
- return CGF.EmitLoadOfAnyValue(
- CGF.MakeAddrLValue(
- EmitVAArgInstr(CGF, VAListAddr, Ty, ABIArgInfo::getDirect()), Ty),
- Slot);
-}
-
-/// Classify argument of given type \p Ty.
-ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
- if (isAggregateTypeForABI(Ty)) {
- if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
- RAA == CGCXXABI::RAA_DirectInMemory);
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
- // Treat an enum type as its underlying type.
- Ty = EnumTy->getDecl()->getIntegerType();
- } else if (Ty->isFloatingType()) {
- // Floating-point types don't go inreg.
- return ABIArgInfo::getDirect();
- } else if (const auto *EIT = Ty->getAs<BitIntType>()) {
- // Treat bit-precise integers as integers if <= 64, otherwise pass
- // indirectly.
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
- : ABIArgInfo::getDirect());
-}
-
-ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
- if (RetTy->isVoidType())
- return ABIArgInfo::getIgnore();
-
- // In the PNaCl ABI we always return records/structures on the stack.
- if (isAggregateTypeForABI(RetTy))
- return getNaturalAlignIndirect(RetTy, getDataLayout().getAllocaAddrSpace());
-
- // Treat bit-precise integers as integers if <= 64, otherwise pass indirectly.
- if (const auto *EIT = RetTy->getAs<BitIntType>()) {
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(RetTy,
- getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- // Treat an enum type as its underlying type.
- if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
- RetTy = EnumTy->getDecl()->getIntegerType();
-
- return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
- : ABIArgInfo::getDirect());
-}
-
-std::unique_ptr<TargetCodeGenInfo>
-CodeGen::createPNaClTargetCodeGenInfo(CodeGenModule &CGM) {
- return std::make_unique<PNaClTargetCodeGenInfo>(CGM.getTypes());
-}
diff --git a/clang/lib/CodeGen/Targets/X86.cpp b/clang/lib/CodeGen/Targets/X86.cpp
index b36a6e1396653..606e5ce780bd0 100644
--- a/clang/lib/CodeGen/Targets/X86.cpp
+++ b/clang/lib/CodeGen/Targets/X86.cpp
@@ -2573,8 +2573,7 @@ GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
if (HiStart != 8) {
// There are usually two sorts of types the ABI generation code can produce
// for the low part of a pair that aren't 8 bytes in size: half, float or
- // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
- // NaCl).
+ // i8/i16/i32. This can also include pointers when they are 32-bit (X32).
// Promote these to a larger type.
if (Lo->isHalfTy() || Lo->isFloatTy())
Lo = llvm::Type::getDoubleTy(Lo->getContext());
diff --git a/clang/lib/Driver/CMakeLists.txt b/clang/lib/Driver/CMakeLists.txt
index 5bdb6614389cf..306d6f689ef0a 100644
--- a/clang/lib/Driver/CMakeLists.txt
+++ b/clang/lib/Driver/CMakeLists.txt
@@ -69,7 +69,6 @@ add_clang_library(clangDriver
ToolChains/MinGW.cpp
ToolChains/MSP430.cpp
ToolChains/MSVC.cpp
- ToolChains/NaCl.cpp
ToolChains/NetBSD.cpp
ToolChains/OHOS...
[truncated]
|
Member
|
@llvm/pr-subscribers-clang-codegen Author: Brad Smith (brad0) ChangesWorking on preparing a patch to remove the Native Client support now that it is finally reaching end of life. Patch is 156.94 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/133661.diff 97 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 497d68779b92b..3c7f3552e4f49 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -336,10 +336,6 @@ class TargetInfo : public TransferrableTargetInfo,
/// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
AArch64ABIBuiltinVaList,
- /// __builtin_va_list as defined by the PNaCl ABI:
- /// http://www.chromium.org/nativeclient/pnacl/bitcode-abi#TOC-Machine-Types
- PNaClABIBuiltinVaList,
-
/// __builtin_va_list as defined by the Power ABI:
/// https://www.power.org
/// /resources/downloads/Power-Arch-32-bit-ABI-supp-1.0-Embedded.pdf
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c9d1bea4c623a..1a63646ab534e 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9740,14 +9740,6 @@ CreateX86_64ABIBuiltinVaListDecl(const ASTContext *Context) {
return Context->buildImplicitTypedef(VaListTagArrayType, "__builtin_va_list");
}
-static TypedefDecl *CreatePNaClABIBuiltinVaListDecl(const ASTContext *Context) {
- // typedef int __builtin_va_list[4];
- llvm::APInt Size(Context->getTypeSize(Context->getSizeType()), 4);
- QualType IntArrayType = Context->getConstantArrayType(
- Context->IntTy, Size, nullptr, ArraySizeModifier::Normal, 0);
- return Context->buildImplicitTypedef(IntArrayType, "__builtin_va_list");
-}
-
static TypedefDecl *
CreateAAPCSABIBuiltinVaListDecl(const ASTContext *Context) {
// struct __va_list
@@ -9945,8 +9937,6 @@ static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
return CreatePowerABIBuiltinVaListDecl(Context);
case TargetInfo::X86_64ABIBuiltinVaList:
return CreateX86_64ABIBuiltinVaListDecl(Context);
- case TargetInfo::PNaClABIBuiltinVaList:
- return CreatePNaClABIBuiltinVaListDecl(Context);
case TargetInfo::AAPCSABIBuiltinVaList:
return CreateAAPCSABIBuiltinVaListDecl(Context);
case TargetInfo::SystemZBuiltinVaList:
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index 331dfbb3f4b67..bb96e3736941f 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -109,7 +109,6 @@ add_clang_library(clangBasic
Targets/Mips.cpp
Targets/NVPTX.cpp
Targets/OSTargets.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index c6d228fe98100..d38c2edc7ebf6 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -29,7 +29,6 @@
#include "Targets/Mips.h"
#include "Targets/NVPTX.h"
#include "Targets/OSTargets.h"
-#include "Targets/PNaCl.h"
#include "Targets/PPC.h"
#include "Targets/RISCV.h"
#include "Targets/SPIR.h"
@@ -225,8 +224,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<RTEMSTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<ARMleTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::Cygnus:
@@ -257,8 +254,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<NetBSDTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
default:
return std::make_unique<ARMbeTargetInfo>(Triple, Opts);
}
@@ -301,9 +296,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<FreeBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
return std::make_unique<NetBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<NaClMips32TargetInfo>>(Triple,
- Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::GNU:
@@ -585,8 +577,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<HaikuX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSX86_32TargetInfo>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_32TargetInfo>>(Triple, Opts);
case llvm::Triple::ELFIAMCU:
return std::make_unique<MCUX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::Hurd:
@@ -646,8 +636,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
}
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<X86_64TargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS4:
return std::make_unique<PS4OSTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS5:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ca2c1ffbb0eb7..518e4ec82ca77 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -58,9 +58,6 @@ void ARMTargetInfo::setABIAAPCS() {
"-a:0:32"
"-n32"
"-S64");
- } else if (T.isOSNaCl()) {
- assert(!BigEndian && "NaCl on ARM does not support big endian");
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S128");
} else {
resetDataLayout(BigEndian
? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h
index a88c851797aab..dbff025265ee6 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -842,53 +842,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsTargetInfo : public OSTargetInfo<Target> {
}
};
-template <typename Target>
-class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
-protected:
- void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
- MacroBuilder &Builder) const override {
- if (Opts.POSIXThreads)
- Builder.defineMacro("_REENTRANT");
- if (Opts.CPlusPlus)
- Builder.defineMacro("_GNU_SOURCE");
-
- DefineStd(Builder, "unix", Opts);
- Builder.defineMacro("__native_client__");
- }
-
-public:
- NaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : OSTargetInfo<Target>(Triple, Opts) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->LongLongWidth = 64;
- this->LongLongAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- // RegParmMax is inherited from the underlying architecture.
- this->LongDoubleFormat = &llvm::APFloat::IEEEdouble();
- if (Triple.getArch() == llvm::Triple::arm) {
- // Handled in ARM's setABI().
- } else if (Triple.getArch() == llvm::Triple::x86) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32-S128");
- } else if (Triple.getArch() == llvm::Triple::x86_64) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32:64-S128");
- } else if (Triple.getArch() == llvm::Triple::mipsel) {
- // Handled on mips' setDataLayout.
- }
- }
-};
-
// Fuchsia Target
template <typename Target>
class LLVM_LIBRARY_VISIBILITY FuchsiaTargetInfo : public OSTargetInfo<Target> {
diff --git a/clang/lib/Basic/Targets/PNaCl.cpp b/clang/lib/Basic/Targets/PNaCl.cpp
deleted file mode 100644
index c4adfbefb9c73..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-//===--- PNaCl.cpp - Implement PNaCl target feature support ---------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PNaCl.h"
-#include "clang/Basic/MacroBuilder.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-ArrayRef<const char *> PNaClTargetInfo::getGCCRegNames() const { return {}; }
-
-ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
- return {};
-}
-
-void PNaClTargetInfo::getArchDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const {
- Builder.defineMacro("__le32__");
- Builder.defineMacro("__pnacl__");
-}
diff --git a/clang/lib/Basic/Targets/PNaCl.h b/clang/lib/Basic/Targets/PNaCl.h
deleted file mode 100644
index d162776b5a0d6..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.h
+++ /dev/null
@@ -1,90 +0,0 @@
-//===--- PNaCl.h - Declare PNaCl target feature support ---------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-
-#include "Mips.h"
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/TargetParser/Triple.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY PNaClTargetInfo : public TargetInfo {
-public:
- PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : TargetInfo(Triple) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- this->RegParmMax = 0; // Disallow regparm
- }
-
- void getArchDefines(const LangOptions &Opts, MacroBuilder &Builder) const;
-
- void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override {
- getArchDefines(Opts, Builder);
- }
-
- bool hasFeature(StringRef Feature) const override {
- return Feature == "pnacl";
- }
-
- llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override {
- return {};
- }
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-
- ArrayRef<const char *> getGCCRegNames() const override;
-
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
-
- bool validateAsmConstraint(const char *&Name,
- TargetInfo::ConstraintInfo &Info) const override {
- return false;
- }
-
- std::string_view getClobbers() const override { return ""; }
-
- bool hasBitIntType() const override { return true; }
-};
-
-// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
-class LLVM_LIBRARY_VISIBILITY NaClMips32TargetInfo : public MipsTargetInfo {
-public:
- NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : MipsTargetInfo(Triple, Opts) {}
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-};
-} // namespace targets
-} // namespace clang
-
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
diff --git a/clang/lib/CodeGen/CMakeLists.txt b/clang/lib/CodeGen/CMakeLists.txt
index ebe2fbd7db295..51769fe895ee3 100644
--- a/clang/lib/CodeGen/CMakeLists.txt
+++ b/clang/lib/CodeGen/CMakeLists.txt
@@ -142,7 +142,6 @@ add_clang_library(clangCodeGen
Targets/MSP430.cpp
Targets/Mips.cpp
Targets/NVPTX.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 5dbd50be6ca1a..2041c5fd0f68a 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -118,9 +118,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createM68kTargetCodeGenInfo(CGM);
case llvm::Triple::mips:
case llvm::Triple::mipsel:
- if (Triple.getOS() == llvm::Triple::NaCl)
- return createPNaClTargetCodeGenInfo(CGM);
- else if (Triple.getOS() == llvm::Triple::Win32)
+ if (Triple.getOS() == llvm::Triple::Win32)
return createWindowsMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
return createMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index 5df19fbef1e5b..44dab29b3ea86 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+++ b/clang/lib/CodeGen/TargetInfo.h
@@ -533,9 +533,6 @@ createMSP430TargetCodeGenInfo(CodeGenModule &CGM);
std::unique_ptr<TargetCodeGenInfo>
createNVPTXTargetCodeGenInfo(CodeGenModule &CGM);
-std::unique_ptr<TargetCodeGenInfo>
-createPNaClTargetCodeGenInfo(CodeGenModule &CGM);
-
enum class PPC64_SVR4_ABIKind {
ELFv1 = 0,
ELFv2,
diff --git a/clang/lib/CodeGen/Targets/PNaCl.cpp b/clang/lib/CodeGen/Targets/PNaCl.cpp
deleted file mode 100644
index 358010785850e..0000000000000
--- a/clang/lib/CodeGen/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,114 +0,0 @@
-//===- PNaCl.cpp ----------------------------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "ABIInfoImpl.h"
-#include "TargetInfo.h"
-
-using namespace clang;
-using namespace clang::CodeGen;
-
-//===----------------------------------------------------------------------===//
-// le32/PNaCl bitcode ABI Implementation
-//
-// This is a simplified version of the x86_32 ABI. Arguments and return values
-// are always passed on the stack.
-//===----------------------------------------------------------------------===//
-
-class PNaClABIInfo : public ABIInfo {
- public:
- PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
-
- ABIArgInfo classifyReturnType(QualType RetTy) const;
- ABIArgInfo classifyArgumentType(QualType RetTy) const;
-
- void computeInfo(CGFunctionInfo &FI) const override;
- RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
- AggValueSlot Slot) const override;
-};
-
-class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
- public:
- PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
- : TargetCodeGenInfo(std::make_unique<PNaClABIInfo>(CGT)) {}
-};
-
-void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
- if (!getCXXABI().classifyReturnType(FI))
- FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
-
- for (auto &I : FI.arguments())
- I.info = classifyArgumentType(I.type);
-}
-
-RValue PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
- QualType Ty, AggValueSlot Slot) const {
- // The PNaCL ABI is a bit odd, in that varargs don't use normal
- // function classification. Structs get passed directly for varargs
- // functions, through a rewriting transform in
- // pnacl-llvm/lib/Transforms/NaCl/ExpandVarArgs.cpp, which allows
- // this target to actually support a va_arg instructions with an
- // aggregate type, unlike other targets.
- return CGF.EmitLoadOfAnyValue(
- CGF.MakeAddrLValue(
- EmitVAArgInstr(CGF, VAListAddr, Ty, ABIArgInfo::getDirect()), Ty),
- Slot);
-}
-
-/// Classify argument of given type \p Ty.
-ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
- if (isAggregateTypeForABI(Ty)) {
- if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
- RAA == CGCXXABI::RAA_DirectInMemory);
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
- // Treat an enum type as its underlying type.
- Ty = EnumTy->getDecl()->getIntegerType();
- } else if (Ty->isFloatingType()) {
- // Floating-point types don't go inreg.
- return ABIArgInfo::getDirect();
- } else if (const auto *EIT = Ty->getAs<BitIntType>()) {
- // Treat bit-precise integers as integers if <= 64, otherwise pass
- // indirectly.
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
- : ABIArgInfo::getDirect());
-}
-
-ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
- if (RetTy->isVoidType())
- return ABIArgInfo::getIgnore();
-
- // In the PNaCl ABI we always return records/structures on the stack.
- if (isAggregateTypeForABI(RetTy))
- return getNaturalAlignIndirect(RetTy, getDataLayout().getAllocaAddrSpace());
-
- // Treat bit-precise integers as integers if <= 64, otherwise pass indirectly.
- if (const auto *EIT = RetTy->getAs<BitIntType>()) {
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(RetTy,
- getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- // Treat an enum type as its underlying type.
- if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
- RetTy = EnumTy->getDecl()->getIntegerType();
-
- return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
- : ABIArgInfo::getDirect());
-}
-
-std::unique_ptr<TargetCodeGenInfo>
-CodeGen::createPNaClTargetCodeGenInfo(CodeGenModule &CGM) {
- return std::make_unique<PNaClTargetCodeGenInfo>(CGM.getTypes());
-}
diff --git a/clang/lib/CodeGen/Targets/X86.cpp b/clang/lib/CodeGen/Targets/X86.cpp
index b36a6e1396653..606e5ce780bd0 100644
--- a/clang/lib/CodeGen/Targets/X86.cpp
+++ b/clang/lib/CodeGen/Targets/X86.cpp
@@ -2573,8 +2573,7 @@ GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
if (HiStart != 8) {
// There are usually two sorts of types the ABI generation code can produce
// for the low part of a pair that aren't 8 bytes in size: half, float or
- // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
- // NaCl).
+ // i8/i16/i32. This can also include pointers when they are 32-bit (X32).
// Promote these to a larger type.
if (Lo->isHalfTy() || Lo->isFloatTy())
Lo = llvm::Type::getDoubleTy(Lo->getContext());
diff --git a/clang/lib/Driver/CMakeLists.txt b/clang/lib/Driver/CMakeLists.txt
index 5bdb6614389cf..306d6f689ef0a 100644
--- a/clang/lib/Driver/CMakeLists.txt
+++ b/clang/lib/Driver/CMakeLists.txt
@@ -69,7 +69,6 @@ add_clang_library(clangDriver
ToolChains/MinGW.cpp
ToolChains/MSP430.cpp
ToolChains/MSVC.cpp
- ToolChains/NaCl.cpp
ToolChains/NetBSD.cpp
ToolChains/OHOS...
[truncated]
|
Member
|
@llvm/pr-subscribers-backend-x86 Author: Brad Smith (brad0) ChangesWorking on preparing a patch to remove the Native Client support now that it is finally reaching end of life. Patch is 156.94 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/133661.diff 97 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 497d68779b92b..3c7f3552e4f49 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -336,10 +336,6 @@ class TargetInfo : public TransferrableTargetInfo,
/// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
AArch64ABIBuiltinVaList,
- /// __builtin_va_list as defined by the PNaCl ABI:
- /// http://www.chromium.org/nativeclient/pnacl/bitcode-abi#TOC-Machine-Types
- PNaClABIBuiltinVaList,
-
/// __builtin_va_list as defined by the Power ABI:
/// https://www.power.org
/// /resources/downloads/Power-Arch-32-bit-ABI-supp-1.0-Embedded.pdf
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c9d1bea4c623a..1a63646ab534e 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9740,14 +9740,6 @@ CreateX86_64ABIBuiltinVaListDecl(const ASTContext *Context) {
return Context->buildImplicitTypedef(VaListTagArrayType, "__builtin_va_list");
}
-static TypedefDecl *CreatePNaClABIBuiltinVaListDecl(const ASTContext *Context) {
- // typedef int __builtin_va_list[4];
- llvm::APInt Size(Context->getTypeSize(Context->getSizeType()), 4);
- QualType IntArrayType = Context->getConstantArrayType(
- Context->IntTy, Size, nullptr, ArraySizeModifier::Normal, 0);
- return Context->buildImplicitTypedef(IntArrayType, "__builtin_va_list");
-}
-
static TypedefDecl *
CreateAAPCSABIBuiltinVaListDecl(const ASTContext *Context) {
// struct __va_list
@@ -9945,8 +9937,6 @@ static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
return CreatePowerABIBuiltinVaListDecl(Context);
case TargetInfo::X86_64ABIBuiltinVaList:
return CreateX86_64ABIBuiltinVaListDecl(Context);
- case TargetInfo::PNaClABIBuiltinVaList:
- return CreatePNaClABIBuiltinVaListDecl(Context);
case TargetInfo::AAPCSABIBuiltinVaList:
return CreateAAPCSABIBuiltinVaListDecl(Context);
case TargetInfo::SystemZBuiltinVaList:
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index 331dfbb3f4b67..bb96e3736941f 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -109,7 +109,6 @@ add_clang_library(clangBasic
Targets/Mips.cpp
Targets/NVPTX.cpp
Targets/OSTargets.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index c6d228fe98100..d38c2edc7ebf6 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -29,7 +29,6 @@
#include "Targets/Mips.h"
#include "Targets/NVPTX.h"
#include "Targets/OSTargets.h"
-#include "Targets/PNaCl.h"
#include "Targets/PPC.h"
#include "Targets/RISCV.h"
#include "Targets/SPIR.h"
@@ -225,8 +224,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<RTEMSTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<ARMleTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::Cygnus:
@@ -257,8 +254,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<NetBSDTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
default:
return std::make_unique<ARMbeTargetInfo>(Triple, Opts);
}
@@ -301,9 +296,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<FreeBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
return std::make_unique<NetBSDTargetInfo<MipsTargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<NaClMips32TargetInfo>>(Triple,
- Opts);
case llvm::Triple::Win32:
switch (Triple.getEnvironment()) {
case llvm::Triple::GNU:
@@ -585,8 +577,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<HaikuX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::RTEMS:
return std::make_unique<RTEMSX86_32TargetInfo>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_32TargetInfo>>(Triple, Opts);
case llvm::Triple::ELFIAMCU:
return std::make_unique<MCUX86_32TargetInfo>(Triple, Opts);
case llvm::Triple::Hurd:
@@ -646,8 +636,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
}
case llvm::Triple::Haiku:
return std::make_unique<HaikuTargetInfo<X86_64TargetInfo>>(Triple, Opts);
- case llvm::Triple::NaCl:
- return std::make_unique<NaClTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS4:
return std::make_unique<PS4OSTargetInfo<X86_64TargetInfo>>(Triple, Opts);
case llvm::Triple::PS5:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ca2c1ffbb0eb7..518e4ec82ca77 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -58,9 +58,6 @@ void ARMTargetInfo::setABIAAPCS() {
"-a:0:32"
"-n32"
"-S64");
- } else if (T.isOSNaCl()) {
- assert(!BigEndian && "NaCl on ARM does not support big endian");
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S128");
} else {
resetDataLayout(BigEndian
? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h
index a88c851797aab..dbff025265ee6 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -842,53 +842,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsTargetInfo : public OSTargetInfo<Target> {
}
};
-template <typename Target>
-class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
-protected:
- void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
- MacroBuilder &Builder) const override {
- if (Opts.POSIXThreads)
- Builder.defineMacro("_REENTRANT");
- if (Opts.CPlusPlus)
- Builder.defineMacro("_GNU_SOURCE");
-
- DefineStd(Builder, "unix", Opts);
- Builder.defineMacro("__native_client__");
- }
-
-public:
- NaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : OSTargetInfo<Target>(Triple, Opts) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->LongLongWidth = 64;
- this->LongLongAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- // RegParmMax is inherited from the underlying architecture.
- this->LongDoubleFormat = &llvm::APFloat::IEEEdouble();
- if (Triple.getArch() == llvm::Triple::arm) {
- // Handled in ARM's setABI().
- } else if (Triple.getArch() == llvm::Triple::x86) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32-S128");
- } else if (Triple.getArch() == llvm::Triple::x86_64) {
- this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
- "i64:64-i128:128-n8:16:32:64-S128");
- } else if (Triple.getArch() == llvm::Triple::mipsel) {
- // Handled on mips' setDataLayout.
- }
- }
-};
-
// Fuchsia Target
template <typename Target>
class LLVM_LIBRARY_VISIBILITY FuchsiaTargetInfo : public OSTargetInfo<Target> {
diff --git a/clang/lib/Basic/Targets/PNaCl.cpp b/clang/lib/Basic/Targets/PNaCl.cpp
deleted file mode 100644
index c4adfbefb9c73..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-//===--- PNaCl.cpp - Implement PNaCl target feature support ---------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PNaCl.h"
-#include "clang/Basic/MacroBuilder.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-ArrayRef<const char *> PNaClTargetInfo::getGCCRegNames() const { return {}; }
-
-ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
- return {};
-}
-
-void PNaClTargetInfo::getArchDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const {
- Builder.defineMacro("__le32__");
- Builder.defineMacro("__pnacl__");
-}
diff --git a/clang/lib/Basic/Targets/PNaCl.h b/clang/lib/Basic/Targets/PNaCl.h
deleted file mode 100644
index d162776b5a0d6..0000000000000
--- a/clang/lib/Basic/Targets/PNaCl.h
+++ /dev/null
@@ -1,90 +0,0 @@
-//===--- PNaCl.h - Declare PNaCl target feature support ---------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares PNaCl TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
-
-#include "Mips.h"
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/TargetParser/Triple.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY PNaClTargetInfo : public TargetInfo {
-public:
- PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : TargetInfo(Triple) {
- this->LongAlign = 32;
- this->LongWidth = 32;
- this->PointerAlign = 32;
- this->PointerWidth = 32;
- this->IntMaxType = TargetInfo::SignedLongLong;
- this->Int64Type = TargetInfo::SignedLongLong;
- this->DoubleAlign = 64;
- this->LongDoubleWidth = 64;
- this->LongDoubleAlign = 64;
- this->SizeType = TargetInfo::UnsignedInt;
- this->PtrDiffType = TargetInfo::SignedInt;
- this->IntPtrType = TargetInfo::SignedInt;
- this->RegParmMax = 0; // Disallow regparm
- }
-
- void getArchDefines(const LangOptions &Opts, MacroBuilder &Builder) const;
-
- void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override {
- getArchDefines(Opts, Builder);
- }
-
- bool hasFeature(StringRef Feature) const override {
- return Feature == "pnacl";
- }
-
- llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override {
- return {};
- }
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-
- ArrayRef<const char *> getGCCRegNames() const override;
-
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
-
- bool validateAsmConstraint(const char *&Name,
- TargetInfo::ConstraintInfo &Info) const override {
- return false;
- }
-
- std::string_view getClobbers() const override { return ""; }
-
- bool hasBitIntType() const override { return true; }
-};
-
-// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
-class LLVM_LIBRARY_VISIBILITY NaClMips32TargetInfo : public MipsTargetInfo {
-public:
- NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
- : MipsTargetInfo(Triple, Opts) {}
-
- BuiltinVaListKind getBuiltinVaListKind() const override {
- return TargetInfo::PNaClABIBuiltinVaList;
- }
-};
-} // namespace targets
-} // namespace clang
-
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
diff --git a/clang/lib/CodeGen/CMakeLists.txt b/clang/lib/CodeGen/CMakeLists.txt
index ebe2fbd7db295..51769fe895ee3 100644
--- a/clang/lib/CodeGen/CMakeLists.txt
+++ b/clang/lib/CodeGen/CMakeLists.txt
@@ -142,7 +142,6 @@ add_clang_library(clangCodeGen
Targets/MSP430.cpp
Targets/Mips.cpp
Targets/NVPTX.cpp
- Targets/PNaCl.cpp
Targets/PPC.cpp
Targets/RISCV.cpp
Targets/SPIR.cpp
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 5dbd50be6ca1a..2041c5fd0f68a 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -118,9 +118,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createM68kTargetCodeGenInfo(CGM);
case llvm::Triple::mips:
case llvm::Triple::mipsel:
- if (Triple.getOS() == llvm::Triple::NaCl)
- return createPNaClTargetCodeGenInfo(CGM);
- else if (Triple.getOS() == llvm::Triple::Win32)
+ if (Triple.getOS() == llvm::Triple::Win32)
return createWindowsMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
return createMIPSTargetCodeGenInfo(CGM, /*IsOS32=*/true);
diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index 5df19fbef1e5b..44dab29b3ea86 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+++ b/clang/lib/CodeGen/TargetInfo.h
@@ -533,9 +533,6 @@ createMSP430TargetCodeGenInfo(CodeGenModule &CGM);
std::unique_ptr<TargetCodeGenInfo>
createNVPTXTargetCodeGenInfo(CodeGenModule &CGM);
-std::unique_ptr<TargetCodeGenInfo>
-createPNaClTargetCodeGenInfo(CodeGenModule &CGM);
-
enum class PPC64_SVR4_ABIKind {
ELFv1 = 0,
ELFv2,
diff --git a/clang/lib/CodeGen/Targets/PNaCl.cpp b/clang/lib/CodeGen/Targets/PNaCl.cpp
deleted file mode 100644
index 358010785850e..0000000000000
--- a/clang/lib/CodeGen/Targets/PNaCl.cpp
+++ /dev/null
@@ -1,114 +0,0 @@
-//===- PNaCl.cpp ----------------------------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "ABIInfoImpl.h"
-#include "TargetInfo.h"
-
-using namespace clang;
-using namespace clang::CodeGen;
-
-//===----------------------------------------------------------------------===//
-// le32/PNaCl bitcode ABI Implementation
-//
-// This is a simplified version of the x86_32 ABI. Arguments and return values
-// are always passed on the stack.
-//===----------------------------------------------------------------------===//
-
-class PNaClABIInfo : public ABIInfo {
- public:
- PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
-
- ABIArgInfo classifyReturnType(QualType RetTy) const;
- ABIArgInfo classifyArgumentType(QualType RetTy) const;
-
- void computeInfo(CGFunctionInfo &FI) const override;
- RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
- AggValueSlot Slot) const override;
-};
-
-class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
- public:
- PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
- : TargetCodeGenInfo(std::make_unique<PNaClABIInfo>(CGT)) {}
-};
-
-void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
- if (!getCXXABI().classifyReturnType(FI))
- FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
-
- for (auto &I : FI.arguments())
- I.info = classifyArgumentType(I.type);
-}
-
-RValue PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
- QualType Ty, AggValueSlot Slot) const {
- // The PNaCL ABI is a bit odd, in that varargs don't use normal
- // function classification. Structs get passed directly for varargs
- // functions, through a rewriting transform in
- // pnacl-llvm/lib/Transforms/NaCl/ExpandVarArgs.cpp, which allows
- // this target to actually support a va_arg instructions with an
- // aggregate type, unlike other targets.
- return CGF.EmitLoadOfAnyValue(
- CGF.MakeAddrLValue(
- EmitVAArgInstr(CGF, VAListAddr, Ty, ABIArgInfo::getDirect()), Ty),
- Slot);
-}
-
-/// Classify argument of given type \p Ty.
-ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
- if (isAggregateTypeForABI(Ty)) {
- if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
- RAA == CGCXXABI::RAA_DirectInMemory);
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
- // Treat an enum type as its underlying type.
- Ty = EnumTy->getDecl()->getIntegerType();
- } else if (Ty->isFloatingType()) {
- // Floating-point types don't go inreg.
- return ABIArgInfo::getDirect();
- } else if (const auto *EIT = Ty->getAs<BitIntType>()) {
- // Treat bit-precise integers as integers if <= 64, otherwise pass
- // indirectly.
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
- : ABIArgInfo::getDirect());
-}
-
-ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
- if (RetTy->isVoidType())
- return ABIArgInfo::getIgnore();
-
- // In the PNaCl ABI we always return records/structures on the stack.
- if (isAggregateTypeForABI(RetTy))
- return getNaturalAlignIndirect(RetTy, getDataLayout().getAllocaAddrSpace());
-
- // Treat bit-precise integers as integers if <= 64, otherwise pass indirectly.
- if (const auto *EIT = RetTy->getAs<BitIntType>()) {
- if (EIT->getNumBits() > 64)
- return getNaturalAlignIndirect(RetTy,
- getDataLayout().getAllocaAddrSpace());
- return ABIArgInfo::getDirect();
- }
-
- // Treat an enum type as its underlying type.
- if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
- RetTy = EnumTy->getDecl()->getIntegerType();
-
- return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
- : ABIArgInfo::getDirect());
-}
-
-std::unique_ptr<TargetCodeGenInfo>
-CodeGen::createPNaClTargetCodeGenInfo(CodeGenModule &CGM) {
- return std::make_unique<PNaClTargetCodeGenInfo>(CGM.getTypes());
-}
diff --git a/clang/lib/CodeGen/Targets/X86.cpp b/clang/lib/CodeGen/Targets/X86.cpp
index b36a6e1396653..606e5ce780bd0 100644
--- a/clang/lib/CodeGen/Targets/X86.cpp
+++ b/clang/lib/CodeGen/Targets/X86.cpp
@@ -2573,8 +2573,7 @@ GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
if (HiStart != 8) {
// There are usually two sorts of types the ABI generation code can produce
// for the low part of a pair that aren't 8 bytes in size: half, float or
- // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
- // NaCl).
+ // i8/i16/i32. This can also include pointers when they are 32-bit (X32).
// Promote these to a larger type.
if (Lo->isHalfTy() || Lo->isFloatTy())
Lo = llvm::Type::getDoubleTy(Lo->getContext());
diff --git a/clang/lib/Driver/CMakeLists.txt b/clang/lib/Driver/CMakeLists.txt
index 5bdb6614389cf..306d6f689ef0a 100644
--- a/clang/lib/Driver/CMakeLists.txt
+++ b/clang/lib/Driver/CMakeLists.txt
@@ -69,7 +69,6 @@ add_clang_library(clangDriver
ToolChains/MinGW.cpp
ToolChains/MSP430.cpp
ToolChains/MSVC.cpp
- ToolChains/NaCl.cpp
ToolChains/NetBSD.cpp
ToolChains/OHOS...
[truncated]
|
You can test this locally with the following command:git-clang-format --diff HEAD~1 HEAD --extensions c,h,cpp -- clang/include/clang/Basic/TargetInfo.h clang/lib/AST/ASTContext.cpp clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/ARM.cpp clang/lib/Basic/Targets/OSTargets.h clang/lib/CodeGen/CodeGenModule.cpp clang/lib/CodeGen/TargetInfo.h clang/lib/CodeGen/Targets/X86.cpp clang/lib/Driver/Driver.cpp clang/lib/Lex/InitHeaderSearch.cpp clang/test/CodeGen/X86/x86_64-longdouble.c clang/test/CodeGen/arm-aapcs-vfp.c clang/test/CodeGen/ext-int-cc.c clang/test/CodeGen/long_double_fp128.cpp clang/test/CodeGen/target-data.c clang/test/Driver/arm-alignment.c clang/test/Driver/unsupported-target-arch.c clang/test/Preprocessor/predefined-macros-no-warnings.c llvm/include/llvm/BinaryFormat/ELF.h llvm/include/llvm/CodeGen/AtomicExpandUtils.h llvm/include/llvm/TargetParser/Triple.h llvm/lib/Target/ARM/ARMAsmPrinter.cpp llvm/lib/Target/ARM/ARMFastISel.cpp llvm/lib/Target/ARM/ARMFrameLowering.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMSubtarget.cpp llvm/lib/Target/ARM/ARMSubtarget.h llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/ARM/ARMTargetTransformInfo.h llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp llvm/lib/Target/Mips/MipsAsmPrinter.cpp llvm/lib/Target/Mips/MipsAsmPrinter.h llvm/lib/Target/Mips/MipsBranchExpansion.cpp llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp llvm/lib/Target/Mips/MipsRegisterInfo.cpp llvm/lib/Target/Mips/MipsSubtarget.h llvm/lib/Target/X86/X86ExpandPseudo.cpp llvm/lib/Target/X86/X86FrameLowering.cpp llvm/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86Subtarget.cpp llvm/lib/Target/X86/X86Subtarget.h llvm/lib/Target/X86/X86TargetMachine.cpp llvm/lib/TargetParser/ARMTargetParser.cpp llvm/lib/TargetParser/Triple.cpp llvm/unittests/TargetParser/TargetParserTest.cppView the diff from clang-format here.diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
index 522c235a9..990ffa0f7 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
@@ -70,31 +70,65 @@ class ARMTTIImpl final : public BasicTTIImplBase<ARMTTIImpl> {
// -thumb-mode in a caller with +thumb-mode, may cause the assembler to
// fail if the callee uses ARM only instructions, e.g. in inline asm.
const FeatureBitset InlineFeaturesAllowed = {
- ARM::FeatureVFP2, ARM::FeatureVFP3, ARM::FeatureNEON, ARM::FeatureThumb2,
- ARM::FeatureFP16, ARM::FeatureVFP4, ARM::FeatureFPARMv8,
- ARM::FeatureFullFP16, ARM::FeatureFP16FML, ARM::FeatureHWDivThumb,
- ARM::FeatureHWDivARM, ARM::FeatureDB, ARM::FeatureV7Clrex,
- ARM::FeatureAcquireRelease, ARM::FeatureSlowFPBrcc,
- ARM::FeaturePerfMon, ARM::FeatureTrustZone, ARM::Feature8MSecExt,
- ARM::FeatureCrypto, ARM::FeatureCRC, ARM::FeatureRAS,
- ARM::FeatureFPAO, ARM::FeatureFuseAES, ARM::FeatureZCZeroing,
- ARM::FeatureProfUnpredicate, ARM::FeatureSlowVGETLNi32,
- ARM::FeatureSlowVDUP32, ARM::FeaturePreferVMOVSR,
- ARM::FeaturePrefISHSTBarrier, ARM::FeatureMuxedUnits,
- ARM::FeatureSlowOddRegister, ARM::FeatureSlowLoadDSubreg,
- ARM::FeatureDontWidenVMOVS, ARM::FeatureExpandMLx,
- ARM::FeatureHasVMLxHazards, ARM::FeatureNEONForFPMovs,
- ARM::FeatureNEONForFP, ARM::FeatureCheckVLDnAlign,
- ARM::FeatureHasSlowFPVMLx, ARM::FeatureHasSlowFPVFMx,
- ARM::FeatureVMLxForwarding, ARM::FeaturePref32BitThumb,
- ARM::FeatureAvoidPartialCPSR, ARM::FeatureCheapPredicableCPSR,
- ARM::FeatureAvoidMOVsShOp, ARM::FeatureHasRetAddrStack,
- ARM::FeatureHasNoBranchPredictor, ARM::FeatureDSP, ARM::FeatureMP,
- ARM::FeatureVirtualization, ARM::FeatureMClass, ARM::FeatureRClass,
- ARM::FeatureAClass, ARM::FeatureStrictAlign, ARM::FeatureLongCalls,
- ARM::FeatureExecuteOnly, ARM::FeatureReserveR9, ARM::FeatureNoMovt,
- ARM::FeatureNoNegativeImmediates
- };
+ ARM::FeatureVFP2,
+ ARM::FeatureVFP3,
+ ARM::FeatureNEON,
+ ARM::FeatureThumb2,
+ ARM::FeatureFP16,
+ ARM::FeatureVFP4,
+ ARM::FeatureFPARMv8,
+ ARM::FeatureFullFP16,
+ ARM::FeatureFP16FML,
+ ARM::FeatureHWDivThumb,
+ ARM::FeatureHWDivARM,
+ ARM::FeatureDB,
+ ARM::FeatureV7Clrex,
+ ARM::FeatureAcquireRelease,
+ ARM::FeatureSlowFPBrcc,
+ ARM::FeaturePerfMon,
+ ARM::FeatureTrustZone,
+ ARM::Feature8MSecExt,
+ ARM::FeatureCrypto,
+ ARM::FeatureCRC,
+ ARM::FeatureRAS,
+ ARM::FeatureFPAO,
+ ARM::FeatureFuseAES,
+ ARM::FeatureZCZeroing,
+ ARM::FeatureProfUnpredicate,
+ ARM::FeatureSlowVGETLNi32,
+ ARM::FeatureSlowVDUP32,
+ ARM::FeaturePreferVMOVSR,
+ ARM::FeaturePrefISHSTBarrier,
+ ARM::FeatureMuxedUnits,
+ ARM::FeatureSlowOddRegister,
+ ARM::FeatureSlowLoadDSubreg,
+ ARM::FeatureDontWidenVMOVS,
+ ARM::FeatureExpandMLx,
+ ARM::FeatureHasVMLxHazards,
+ ARM::FeatureNEONForFPMovs,
+ ARM::FeatureNEONForFP,
+ ARM::FeatureCheckVLDnAlign,
+ ARM::FeatureHasSlowFPVMLx,
+ ARM::FeatureHasSlowFPVFMx,
+ ARM::FeatureVMLxForwarding,
+ ARM::FeaturePref32BitThumb,
+ ARM::FeatureAvoidPartialCPSR,
+ ARM::FeatureCheapPredicableCPSR,
+ ARM::FeatureAvoidMOVsShOp,
+ ARM::FeatureHasRetAddrStack,
+ ARM::FeatureHasNoBranchPredictor,
+ ARM::FeatureDSP,
+ ARM::FeatureMP,
+ ARM::FeatureVirtualization,
+ ARM::FeatureMClass,
+ ARM::FeatureRClass,
+ ARM::FeatureAClass,
+ ARM::FeatureStrictAlign,
+ ARM::FeatureLongCalls,
+ ARM::FeatureExecuteOnly,
+ ARM::FeatureReserveR9,
+ ARM::FeatureNoMovt,
+ ARM::FeatureNoNegativeImmediates};
const ARMSubtarget *getST() const { return ST; }
const ARMTargetLowering *getTLI() const { return TLI; }
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 7fc02fb81..6cf39cef7 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -302,7 +302,8 @@ StringRef Triple::getOSTypeName(OSType Kind) {
case Managarm:
return "managarm";
case Mesa3D: return "mesa3d";
- case NVCL: return "nvcl";
+ case NVCL:
+ return "nvcl";
case NetBSD: return "netbsd";
case OpenBSD: return "openbsd";
case PS4: return "ps4";
@@ -672,49 +673,49 @@ static Triple::VendorType parseVendor(StringRef VendorName) {
static Triple::OSType parseOS(StringRef OSName) {
return StringSwitch<Triple::OSType>(OSName)
- .StartsWith("darwin", Triple::Darwin)
- .StartsWith("dragonfly", Triple::DragonFly)
- .StartsWith("freebsd", Triple::FreeBSD)
- .StartsWith("fuchsia", Triple::Fuchsia)
- .StartsWith("ios", Triple::IOS)
- .StartsWith("kfreebsd", Triple::KFreeBSD)
- .StartsWith("linux", Triple::Linux)
- .StartsWith("lv2", Triple::Lv2)
- .StartsWith("macos", Triple::MacOSX)
- .StartsWith("managarm", Triple::Managarm)
- .StartsWith("netbsd", Triple::NetBSD)
- .StartsWith("openbsd", Triple::OpenBSD)
- .StartsWith("solaris", Triple::Solaris)
- .StartsWith("uefi", Triple::UEFI)
- .StartsWith("win32", Triple::Win32)
- .StartsWith("windows", Triple::Win32)
- .StartsWith("zos", Triple::ZOS)
- .StartsWith("haiku", Triple::Haiku)
- .StartsWith("rtems", Triple::RTEMS)
- .StartsWith("aix", Triple::AIX)
- .StartsWith("cuda", Triple::CUDA)
- .StartsWith("nvcl", Triple::NVCL)
- .StartsWith("amdhsa", Triple::AMDHSA)
- .StartsWith("ps4", Triple::PS4)
- .StartsWith("ps5", Triple::PS5)
- .StartsWith("elfiamcu", Triple::ELFIAMCU)
- .StartsWith("tvos", Triple::TvOS)
- .StartsWith("watchos", Triple::WatchOS)
- .StartsWith("bridgeos", Triple::BridgeOS)
- .StartsWith("driverkit", Triple::DriverKit)
- .StartsWith("xros", Triple::XROS)
- .StartsWith("visionos", Triple::XROS)
- .StartsWith("mesa3d", Triple::Mesa3D)
- .StartsWith("amdpal", Triple::AMDPAL)
- .StartsWith("hermit", Triple::HermitCore)
- .StartsWith("hurd", Triple::Hurd)
- .StartsWith("wasi", Triple::WASI)
- .StartsWith("emscripten", Triple::Emscripten)
- .StartsWith("shadermodel", Triple::ShaderModel)
- .StartsWith("liteos", Triple::LiteOS)
- .StartsWith("serenity", Triple::Serenity)
- .StartsWith("vulkan", Triple::Vulkan)
- .Default(Triple::UnknownOS);
+ .StartsWith("darwin", Triple::Darwin)
+ .StartsWith("dragonfly", Triple::DragonFly)
+ .StartsWith("freebsd", Triple::FreeBSD)
+ .StartsWith("fuchsia", Triple::Fuchsia)
+ .StartsWith("ios", Triple::IOS)
+ .StartsWith("kfreebsd", Triple::KFreeBSD)
+ .StartsWith("linux", Triple::Linux)
+ .StartsWith("lv2", Triple::Lv2)
+ .StartsWith("macos", Triple::MacOSX)
+ .StartsWith("managarm", Triple::Managarm)
+ .StartsWith("netbsd", Triple::NetBSD)
+ .StartsWith("openbsd", Triple::OpenBSD)
+ .StartsWith("solaris", Triple::Solaris)
+ .StartsWith("uefi", Triple::UEFI)
+ .StartsWith("win32", Triple::Win32)
+ .StartsWith("windows", Triple::Win32)
+ .StartsWith("zos", Triple::ZOS)
+ .StartsWith("haiku", Triple::Haiku)
+ .StartsWith("rtems", Triple::RTEMS)
+ .StartsWith("aix", Triple::AIX)
+ .StartsWith("cuda", Triple::CUDA)
+ .StartsWith("nvcl", Triple::NVCL)
+ .StartsWith("amdhsa", Triple::AMDHSA)
+ .StartsWith("ps4", Triple::PS4)
+ .StartsWith("ps5", Triple::PS5)
+ .StartsWith("elfiamcu", Triple::ELFIAMCU)
+ .StartsWith("tvos", Triple::TvOS)
+ .StartsWith("watchos", Triple::WatchOS)
+ .StartsWith("bridgeos", Triple::BridgeOS)
+ .StartsWith("driverkit", Triple::DriverKit)
+ .StartsWith("xros", Triple::XROS)
+ .StartsWith("visionos", Triple::XROS)
+ .StartsWith("mesa3d", Triple::Mesa3D)
+ .StartsWith("amdpal", Triple::AMDPAL)
+ .StartsWith("hermit", Triple::HermitCore)
+ .StartsWith("hurd", Triple::Hurd)
+ .StartsWith("wasi", Triple::WASI)
+ .StartsWith("emscripten", Triple::Emscripten)
+ .StartsWith("shadermodel", Triple::ShaderModel)
+ .StartsWith("liteos", Triple::LiteOS)
+ .StartsWith("serenity", Triple::Serenity)
+ .StartsWith("vulkan", Triple::Vulkan)
+ .Default(Triple::UnknownOS);
}
static Triple::EnvironmentType parseEnvironment(StringRef EnvironmentName) {
|
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Contributor
|
Member
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Thanks for working on this! |
Contributor
Author
I don't plan on commiting this very soon. As in at least after the 21 release, maybe closer to 22. Just trying to get something in shape and reviewed first. |
Member
Thanks! After this change goes through, we should look to eliminate the BundleAlignSize/ |
Contributor
Author
|
@MaskRay Another thing I wanted to ask about was there were some tests I removed with nacl in the name that used nacl triples as well as rodata-section.s. I am not sure if any of them are still relevant outside of a nacl environment. Should they be renamed and use a different triple or any other changes? |
Member
Is it feasible to remove ARM and MIPS support earlier? (Also make the PR smaller)
|
Member
I hope this remains on schedule. I want to remove AlignedBundling support from MCAssembler; its presence has made improving fragment relaxation within the assembler exceptionally difficult. |
Member
Concrete benefits:
|
Member
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NaCl deprecation and removal from Chromium is now complete, so we can remove NaCl support from LLVM now. |
Contributor
Author
|
@MaskRay Let me know if it's Ok to go ahead. |
MaskRay
approved these changes
Jul 15, 2025
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/20282 Here is the relevant piece of the build log for the reference |
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NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl target support from gold. * Makefile.am (CCFILES): Remove nacl.cc. (HFILES): Remove nacl.h. * Makefile.in: Regenerated. * aarch64.cc: Don't include nacl.h. * arm.cc: Don't include nacl.h. (Target_arm_nacl): Removed. (Output_data_plt_arm_nacl): Likewise. (target_selector_arm): Replace Target_arm_nacl with Target_selector_arm. * i386.cc: Don't include nacl.h. (Output_data_plt_i386_nacl): Removed. (Target_i386_nacl): Likewise. (target_selector_i386): Replace Target_selector_i386_nacl with Target_selector_i386. * mips.cc: Don't include nacl.h. (Target_mips_nacl): Removed. (Target_selector_mips_nacl): Likewise. (target_selector_mips32): Replace Target_selector_mips_nacl with Target_selector_mips. (target_selector_mips32el): Likewise. (target_selector_mips64): Likewise. (target_selector_mips64el): Likewise. * nacl.cc: Removed. * nacl.h: Likewise. * x86_64.cc: Don't include nacl.h. (Output_data_plt_x86_64_nacl): Removed. (Target_x86_64_nacl): Likewise. (target_selector_x86_64): Replace Target_x86_64_nacl with Target_selector_x86_64. (target_selector_x32): Likewise. * po/POTFILES.in: Regenerated. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Jul 21, 2025
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl/arm target support from bfd, binutils, gas and ld. bfd/ * Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo. (BFD32_BACKENDS_CFILES): Remove elf-nacl.c. (SOURCE_HFILES): Remove elf-nacl.h. * Makefile.in: Regenerated. * config.bfd: Add *-*-nacl* to obsolete targets. Remove *-*-nacl* targets. * configure.ac: Remove nacl target vectors. * elf-bfd.h (elf_target_os): Remove is_nacl. * elf-nacl.c: Removed. * elf-nacl.h: Likewise. * elf32-arm.c: Don't include "elf-nacl.h". (elf32_arm_nacl_plt0_entry): Removed. (elf32_arm_nacl_plt_entry): Likewise. (elf32_arm_stub_long_branch_arm_nacl): Likewise. (elf32_arm_stub_long_branch_arm_nacl_pic): Likewise. (arm_movw_immediate): Likewise. (arm_movt_immediate): Likewise. (arm_nacl_put_plt0): Likewise. (elf32_arm_nacl_link_hash_table_create): Likewise. (elf32_arm_nacl_modify_segment_map): Likewise. (elf32_arm_nacl_final_write_processing): Likewise. (elf32_arm_nacl_plt_sym_val): Likewise. (elf32_arm_stub_cmse_branch_thumb_only): Remove long_branch_arm_nacl and long_branch_arm_nacl_pic entries. (arm_type_of_stub): Updated. (elf32_arm_create_or_find_stub_sec): Likewise. (arm_stub_required_alignment): Likewise. (elf32_arm_allocate_plt_entry): Likewise. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (elf32_arm_output_arch_local_syms): Likewise. Remove elf32_arm_nacl_bed. * targets.c: Remove NaCl target vectors. * bfd-in2.h: Regenerated. * configure: Likewise. * po/SRC-POTFILES.in: Likewise. binutils/ * NEWS: Mention NaCl target support removal. * testsuite/lib/binutils-common.exp: Remove NaCl target support. gas/ * NEWS: Mention NaCl target support removal. * configure.tgt: Likewise. * config/tc-arm.c: Remove NaCl target support. * testsuite/gas/arm/any-armv8m.d: Likewise. * testsuite/gas/arm/any-cmse-main.d: Likewise. * testsuite/gas/arm/any-cmse.d: Likewise. * testsuite/gas/arm/any-idiv.d: Likewise. * testsuite/gas/arm/arch4t-eabi.d: Likewise. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/armv8m.base-idiv.d: Likewise. * testsuite/gas/arm/armv9-a_arch.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise. * testsuite/gas/arm/attr-any-armv4t.d: Likewise. * testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * testsuite/gas/arm/attr-arch-assumption.d: Likewise. * testsuite/gas/arm/attr-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-default.d: Likewise. * testsuite/gas/arm/attr-empty-string.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5.d: Likewise. * testsuite/gas/arm/attr-ext-idiv.d: Likewise. * testsuite/gas/arm/attr-ext-mp.d: Likewise. * testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise. * testsuite/gas/arm/attr-ext-sec.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4.d: Likewise. * testsuite/gas/arm/attr-march-all.d: Likewise. * testsuite/gas/arm/attr-march-armv1.d: Likewise. * testsuite/gas/arm/attr-march-armv2.d: Likewise. * testsuite/gas/arm/attr-march-armv2a.d: Likewise. * testsuite/gas/arm/attr-march-armv2s.d: Likewise. * testsuite/gas/arm/attr-march-armv3.d: Likewise. * testsuite/gas/arm/attr-march-armv3m.d: Likewise. * testsuite/gas/arm/attr-march-armv4.d: Likewise. * testsuite/gas/arm/attr-march-armv4t.d: Likewise. * testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * testsuite/gas/arm/attr-march-armv5.d: Likewise. * testsuite/gas/arm/attr-march-armv5t.d: Likewise. * testsuite/gas/arm/attr-march-armv5te.d: Likewise. * testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6.d: Likewise. * testsuite/gas/arm/attr-march-armv6j.d: Likewise. * testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv6k.d: Likewise. * testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6kz.d: Likewise. * testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * testsuite/gas/arm/attr-march-armv6z.d: Likewise. * testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv7-m.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r.d: Likewise. * testsuite/gas/arm/attr-march-armv7.d: Likewise. * testsuite/gas/arm/attr-march-armv7a.d: Likewise. * testsuite/gas/arm/attr-march-armv7em.d: Likewise. * testsuite/gas/arm/attr-march-armv7m.d: Likewise. * testsuite/gas/arm/attr-march-armv7r.d: Likewise. * testsuite/gas/arm/attr-march-armv7ve.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.base.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/attr-march-xscale.d: Likewise. * testsuite/gas/arm/attr-mcpu.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * testsuite/gas/arm/attr-names.d: Likewise. * testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise. * testsuite/gas/arm/attr-order.d: Likewise. * testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-override-mcpu.d: Likewise. * testsuite/gas/arm/bl-local-2.d: Likewise. * testsuite/gas/arm/bl-local-v4t.d: Likewise. * testsuite/gas/arm/blx-local.d: Likewise. * testsuite/gas/arm/branch-reloc.d: Likewise. * testsuite/gas/arm/directives.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/mov-highregs-any.d: Likewise. * testsuite/gas/arm/mov-lowregs-any.d: Likewise. * testsuite/gas/arm/note-march-armv2.d: Likewise. * testsuite/gas/arm/note-march-armv2a.d: Likewise. * testsuite/gas/arm/note-march-armv3.d: Likewise. * testsuite/gas/arm/note-march-armv3m.d: Likewise. * testsuite/gas/arm/note-march-armv4.d: Likewise. * testsuite/gas/arm/note-march-armv4t.d: Likewise. * testsuite/gas/arm/note-march-armv5.d: Likewise. * testsuite/gas/arm/note-march-armv5t.d: Likewise. * testsuite/gas/arm/note-march-armv5te.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/note-march-xscale.d: Likewise. * testsuite/gas/arm/pr12198-1.d: Likewise. * testsuite/gas/arm/pr12198-2.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * config/te-nacl.h: Removed. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and and earmelfb_nacl.c. Remove NaCl dep files. * NEWS: Mention NaCl target support removal. * configure.tgt: Remove NaCl target support. * Makefile.in: Regenerated. * configure: Likewise. * po/BLD-POTFILES.in: Likewise. * emulparams/armelf_nacl.sh: Removed. * emulparams/armelfb_nacl.sh: Likewise. * emulparams/elf_nacl.sh: Likewise. * testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise. * testsuite/ld-arm/farcall-arm-nacl.d: Likewise. * testsuite/ld-arm/farcall-data-nacl.d: Likewise. * testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d: Adjusted. * testsuite/ld-arm/arm-elf.exp: Remove NaCl target support. * testsuite/ld-arm/cortex-a8-far.d: Likewise. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/build-id.exp: Likewise. * testsuite/ld-elf/ehdr_start-missing.d: Likewise. * testsuite/ld-elf/ehdr_start-shared.d: Likewise. * testsuite/ld-elf/ehdr_start-userdef.d: Likewise. * testsuite/ld-elf/ehdr_start-weak.d: Likewise. * testsuite/ld-elf/ehdr_start.d: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/export-class.exp: Likewise. * testsuite/ld-elf/fatal-warnings-1a.d: Likewise. * testsuite/ld-elf/fatal-warnings-1b.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/package-note.exp: Likewise. * testsuite/ld-elf/pr16322.d: Likewise. * testsuite/ld-elf/pr16498a.d: Likewise. * testsuite/ld-elf/pr16498b.d: Likewise. * testsuite/ld-elf/pr19162.d: Likewise. * testsuite/ld-elf/pr22269a.d: Likewise. * testsuite/ld-elf/pr22269b.d: Likewise. * testsuite/ld-elf/pr22393-1a.d: Likewise. * testsuite/ld-elf/pr22393-1b.d: Likewise. * testsuite/ld-elf/pr22393-1c.d: Likewise. * testsuite/ld-elf/pr22393-1d.d: Likewise. * testsuite/ld-elf/pr22393-1e.d: Likewise. * testsuite/ld-elf/pr22393-1f.d: Likewise. * testsuite/ld-elf/pr22393-2a.rd: Likewise. * testsuite/ld-elf/pr22393-2b.rd: Likewise. * testsuite/ld-elf/pr23900-1-32.rd: Likewise. * testsuite/ld-elf/pr23900-1-64.rd: Likewise. * testsuite/ld-elf/pr23900-1.d: Likewise. * testsuite/ld-elf/pr23900-2a.d: Likewise. * testsuite/ld-elf/pr23900-2b.d: Likewise. * testsuite/ld-elf/pr30508.d: Likewise. * testsuite/ld-elf/pr30907-1.d: Likewise. * testsuite/ld-elf/pr30907-2.d: Likewise. * testsuite/ld-elf/pr32341.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto-binutils.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-scripts/rgn-at3.d: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
luismgsilva
pushed a commit
to foss-for-mips-arc-processors/binutils-gdb
that referenced
this pull request
Mar 5, 2026
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl target support from gold. * Makefile.am (CCFILES): Remove nacl.cc. (HFILES): Remove nacl.h. * Makefile.in: Regenerated. * aarch64.cc: Don't include nacl.h. * arm.cc: Don't include nacl.h. (Target_arm_nacl): Removed. (Output_data_plt_arm_nacl): Likewise. (target_selector_arm): Replace Target_arm_nacl with Target_selector_arm. * i386.cc: Don't include nacl.h. (Output_data_plt_i386_nacl): Removed. (Target_i386_nacl): Likewise. (target_selector_i386): Replace Target_selector_i386_nacl with Target_selector_i386. * mips.cc: Don't include nacl.h. (Target_mips_nacl): Removed. (Target_selector_mips_nacl): Likewise. (target_selector_mips32): Replace Target_selector_mips_nacl with Target_selector_mips. (target_selector_mips32el): Likewise. (target_selector_mips64): Likewise. (target_selector_mips64el): Likewise. * nacl.cc: Removed. * nacl.h: Likewise. * x86_64.cc: Don't include nacl.h. (Output_data_plt_x86_64_nacl): Removed. (Target_x86_64_nacl): Likewise. (target_selector_x86_64): Replace Target_x86_64_nacl with Target_selector_x86_64. (target_selector_x32): Likewise. * po/POTFILES.in: Regenerated. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
luismgsilva
pushed a commit
to foss-for-mips-arc-processors/binutils-gdb
that referenced
this pull request
Mar 5, 2026
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl/arm target support from bfd, binutils, gas and ld. bfd/ * Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo. (BFD32_BACKENDS_CFILES): Remove elf-nacl.c. (SOURCE_HFILES): Remove elf-nacl.h. * Makefile.in: Regenerated. * config.bfd: Add *-*-nacl* to obsolete targets. Remove *-*-nacl* targets. * configure.ac: Remove nacl target vectors. * elf-bfd.h (elf_target_os): Remove is_nacl. * elf-nacl.c: Removed. * elf-nacl.h: Likewise. * elf32-arm.c: Don't include "elf-nacl.h". (elf32_arm_nacl_plt0_entry): Removed. (elf32_arm_nacl_plt_entry): Likewise. (elf32_arm_stub_long_branch_arm_nacl): Likewise. (elf32_arm_stub_long_branch_arm_nacl_pic): Likewise. (arm_movw_immediate): Likewise. (arm_movt_immediate): Likewise. (arm_nacl_put_plt0): Likewise. (elf32_arm_nacl_link_hash_table_create): Likewise. (elf32_arm_nacl_modify_segment_map): Likewise. (elf32_arm_nacl_final_write_processing): Likewise. (elf32_arm_nacl_plt_sym_val): Likewise. (elf32_arm_stub_cmse_branch_thumb_only): Remove long_branch_arm_nacl and long_branch_arm_nacl_pic entries. (arm_type_of_stub): Updated. (elf32_arm_create_or_find_stub_sec): Likewise. (arm_stub_required_alignment): Likewise. (elf32_arm_allocate_plt_entry): Likewise. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (elf32_arm_output_arch_local_syms): Likewise. Remove elf32_arm_nacl_bed. * targets.c: Remove NaCl target vectors. * bfd-in2.h: Regenerated. * configure: Likewise. * po/SRC-POTFILES.in: Likewise. binutils/ * NEWS: Mention NaCl target support removal. * testsuite/lib/binutils-common.exp: Remove NaCl target support. gas/ * NEWS: Mention NaCl target support removal. * configure.tgt: Likewise. * config/tc-arm.c: Remove NaCl target support. * testsuite/gas/arm/any-armv8m.d: Likewise. * testsuite/gas/arm/any-cmse-main.d: Likewise. * testsuite/gas/arm/any-cmse.d: Likewise. * testsuite/gas/arm/any-idiv.d: Likewise. * testsuite/gas/arm/arch4t-eabi.d: Likewise. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/armv8m.base-idiv.d: Likewise. * testsuite/gas/arm/armv9-a_arch.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise. * testsuite/gas/arm/attr-any-armv4t.d: Likewise. * testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * testsuite/gas/arm/attr-arch-assumption.d: Likewise. * testsuite/gas/arm/attr-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-default.d: Likewise. * testsuite/gas/arm/attr-empty-string.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5.d: Likewise. * testsuite/gas/arm/attr-ext-idiv.d: Likewise. * testsuite/gas/arm/attr-ext-mp.d: Likewise. * testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise. * testsuite/gas/arm/attr-ext-sec.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4.d: Likewise. * testsuite/gas/arm/attr-march-all.d: Likewise. * testsuite/gas/arm/attr-march-armv1.d: Likewise. * testsuite/gas/arm/attr-march-armv2.d: Likewise. * testsuite/gas/arm/attr-march-armv2a.d: Likewise. * testsuite/gas/arm/attr-march-armv2s.d: Likewise. * testsuite/gas/arm/attr-march-armv3.d: Likewise. * testsuite/gas/arm/attr-march-armv3m.d: Likewise. * testsuite/gas/arm/attr-march-armv4.d: Likewise. * testsuite/gas/arm/attr-march-armv4t.d: Likewise. * testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * testsuite/gas/arm/attr-march-armv5.d: Likewise. * testsuite/gas/arm/attr-march-armv5t.d: Likewise. * testsuite/gas/arm/attr-march-armv5te.d: Likewise. * testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6.d: Likewise. * testsuite/gas/arm/attr-march-armv6j.d: Likewise. * testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv6k.d: Likewise. * testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6kz.d: Likewise. * testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * testsuite/gas/arm/attr-march-armv6z.d: Likewise. * testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv7-m.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r.d: Likewise. * testsuite/gas/arm/attr-march-armv7.d: Likewise. * testsuite/gas/arm/attr-march-armv7a.d: Likewise. * testsuite/gas/arm/attr-march-armv7em.d: Likewise. * testsuite/gas/arm/attr-march-armv7m.d: Likewise. * testsuite/gas/arm/attr-march-armv7r.d: Likewise. * testsuite/gas/arm/attr-march-armv7ve.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.base.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/attr-march-xscale.d: Likewise. * testsuite/gas/arm/attr-mcpu.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * testsuite/gas/arm/attr-names.d: Likewise. * testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise. * testsuite/gas/arm/attr-order.d: Likewise. * testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-override-mcpu.d: Likewise. * testsuite/gas/arm/bl-local-2.d: Likewise. * testsuite/gas/arm/bl-local-v4t.d: Likewise. * testsuite/gas/arm/blx-local.d: Likewise. * testsuite/gas/arm/branch-reloc.d: Likewise. * testsuite/gas/arm/directives.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/mov-highregs-any.d: Likewise. * testsuite/gas/arm/mov-lowregs-any.d: Likewise. * testsuite/gas/arm/note-march-armv2.d: Likewise. * testsuite/gas/arm/note-march-armv2a.d: Likewise. * testsuite/gas/arm/note-march-armv3.d: Likewise. * testsuite/gas/arm/note-march-armv3m.d: Likewise. * testsuite/gas/arm/note-march-armv4.d: Likewise. * testsuite/gas/arm/note-march-armv4t.d: Likewise. * testsuite/gas/arm/note-march-armv5.d: Likewise. * testsuite/gas/arm/note-march-armv5t.d: Likewise. * testsuite/gas/arm/note-march-armv5te.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/note-march-xscale.d: Likewise. * testsuite/gas/arm/pr12198-1.d: Likewise. * testsuite/gas/arm/pr12198-2.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * config/te-nacl.h: Removed. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and and earmelfb_nacl.c. Remove NaCl dep files. * NEWS: Mention NaCl target support removal. * configure.tgt: Remove NaCl target support. * Makefile.in: Regenerated. * configure: Likewise. * po/BLD-POTFILES.in: Likewise. * emulparams/armelf_nacl.sh: Removed. * emulparams/armelfb_nacl.sh: Likewise. * emulparams/elf_nacl.sh: Likewise. * testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise. * testsuite/ld-arm/farcall-arm-nacl.d: Likewise. * testsuite/ld-arm/farcall-data-nacl.d: Likewise. * testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d: Adjusted. * testsuite/ld-arm/arm-elf.exp: Remove NaCl target support. * testsuite/ld-arm/cortex-a8-far.d: Likewise. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/build-id.exp: Likewise. * testsuite/ld-elf/ehdr_start-missing.d: Likewise. * testsuite/ld-elf/ehdr_start-shared.d: Likewise. * testsuite/ld-elf/ehdr_start-userdef.d: Likewise. * testsuite/ld-elf/ehdr_start-weak.d: Likewise. * testsuite/ld-elf/ehdr_start.d: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/export-class.exp: Likewise. * testsuite/ld-elf/fatal-warnings-1a.d: Likewise. * testsuite/ld-elf/fatal-warnings-1b.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/package-note.exp: Likewise. * testsuite/ld-elf/pr16322.d: Likewise. * testsuite/ld-elf/pr16498a.d: Likewise. * testsuite/ld-elf/pr16498b.d: Likewise. * testsuite/ld-elf/pr19162.d: Likewise. * testsuite/ld-elf/pr22269a.d: Likewise. * testsuite/ld-elf/pr22269b.d: Likewise. * testsuite/ld-elf/pr22393-1a.d: Likewise. * testsuite/ld-elf/pr22393-1b.d: Likewise. * testsuite/ld-elf/pr22393-1c.d: Likewise. * testsuite/ld-elf/pr22393-1d.d: Likewise. * testsuite/ld-elf/pr22393-1e.d: Likewise. * testsuite/ld-elf/pr22393-1f.d: Likewise. * testsuite/ld-elf/pr22393-2a.rd: Likewise. * testsuite/ld-elf/pr22393-2b.rd: Likewise. * testsuite/ld-elf/pr23900-1-32.rd: Likewise. * testsuite/ld-elf/pr23900-1-64.rd: Likewise. * testsuite/ld-elf/pr23900-1.d: Likewise. * testsuite/ld-elf/pr23900-2a.d: Likewise. * testsuite/ld-elf/pr23900-2b.d: Likewise. * testsuite/ld-elf/pr30508.d: Likewise. * testsuite/ld-elf/pr30907-1.d: Likewise. * testsuite/ld-elf/pr30907-2.d: Likewise. * testsuite/ld-elf/pr32341.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto-binutils.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-scripts/rgn-at3.d: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
luismgsilva
pushed a commit
to foss-for-mips-arc-processors/binutils-gdb
that referenced
this pull request
Mar 6, 2026
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl target support from gold. * Makefile.am (CCFILES): Remove nacl.cc. (HFILES): Remove nacl.h. * Makefile.in: Regenerated. * aarch64.cc: Don't include nacl.h. * arm.cc: Don't include nacl.h. (Target_arm_nacl): Removed. (Output_data_plt_arm_nacl): Likewise. (target_selector_arm): Replace Target_arm_nacl with Target_selector_arm. * i386.cc: Don't include nacl.h. (Output_data_plt_i386_nacl): Removed. (Target_i386_nacl): Likewise. (target_selector_i386): Replace Target_selector_i386_nacl with Target_selector_i386. * mips.cc: Don't include nacl.h. (Target_mips_nacl): Removed. (Target_selector_mips_nacl): Likewise. (target_selector_mips32): Replace Target_selector_mips_nacl with Target_selector_mips. (target_selector_mips32el): Likewise. (target_selector_mips64): Likewise. (target_selector_mips64el): Likewise. * nacl.cc: Removed. * nacl.h: Likewise. * x86_64.cc: Don't include nacl.h. (Output_data_plt_x86_64_nacl): Removed. (Target_x86_64_nacl): Likewise. (target_selector_x86_64): Replace Target_x86_64_nacl with Target_selector_x86_64. (target_selector_x32): Likewise. * po/POTFILES.in: Regenerated. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
luismgsilva
pushed a commit
to foss-for-mips-arc-processors/binutils-gdb
that referenced
this pull request
Mar 6, 2026
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: llvm/llvm-project#133661 Remove NaCl/arm target support from bfd, binutils, gas and ld. bfd/ * Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo. (BFD32_BACKENDS_CFILES): Remove elf-nacl.c. (SOURCE_HFILES): Remove elf-nacl.h. * Makefile.in: Regenerated. * config.bfd: Add *-*-nacl* to obsolete targets. Remove *-*-nacl* targets. * configure.ac: Remove nacl target vectors. * elf-bfd.h (elf_target_os): Remove is_nacl. * elf-nacl.c: Removed. * elf-nacl.h: Likewise. * elf32-arm.c: Don't include "elf-nacl.h". (elf32_arm_nacl_plt0_entry): Removed. (elf32_arm_nacl_plt_entry): Likewise. (elf32_arm_stub_long_branch_arm_nacl): Likewise. (elf32_arm_stub_long_branch_arm_nacl_pic): Likewise. (arm_movw_immediate): Likewise. (arm_movt_immediate): Likewise. (arm_nacl_put_plt0): Likewise. (elf32_arm_nacl_link_hash_table_create): Likewise. (elf32_arm_nacl_modify_segment_map): Likewise. (elf32_arm_nacl_final_write_processing): Likewise. (elf32_arm_nacl_plt_sym_val): Likewise. (elf32_arm_stub_cmse_branch_thumb_only): Remove long_branch_arm_nacl and long_branch_arm_nacl_pic entries. (arm_type_of_stub): Updated. (elf32_arm_create_or_find_stub_sec): Likewise. (arm_stub_required_alignment): Likewise. (elf32_arm_allocate_plt_entry): Likewise. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (elf32_arm_output_arch_local_syms): Likewise. Remove elf32_arm_nacl_bed. * targets.c: Remove NaCl target vectors. * bfd-in2.h: Regenerated. * configure: Likewise. * po/SRC-POTFILES.in: Likewise. binutils/ * NEWS: Mention NaCl target support removal. * testsuite/lib/binutils-common.exp: Remove NaCl target support. gas/ * NEWS: Mention NaCl target support removal. * configure.tgt: Likewise. * config/tc-arm.c: Remove NaCl target support. * testsuite/gas/arm/any-armv8m.d: Likewise. * testsuite/gas/arm/any-cmse-main.d: Likewise. * testsuite/gas/arm/any-cmse.d: Likewise. * testsuite/gas/arm/any-idiv.d: Likewise. * testsuite/gas/arm/arch4t-eabi.d: Likewise. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/armv8m.base-idiv.d: Likewise. * testsuite/gas/arm/armv9-a_arch.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise. * testsuite/gas/arm/attr-any-armv4t.d: Likewise. * testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * testsuite/gas/arm/attr-arch-assumption.d: Likewise. * testsuite/gas/arm/attr-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-default.d: Likewise. * testsuite/gas/arm/attr-empty-string.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5.d: Likewise. * testsuite/gas/arm/attr-ext-idiv.d: Likewise. * testsuite/gas/arm/attr-ext-mp.d: Likewise. * testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise. * testsuite/gas/arm/attr-ext-sec.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4.d: Likewise. * testsuite/gas/arm/attr-march-all.d: Likewise. * testsuite/gas/arm/attr-march-armv1.d: Likewise. * testsuite/gas/arm/attr-march-armv2.d: Likewise. * testsuite/gas/arm/attr-march-armv2a.d: Likewise. * testsuite/gas/arm/attr-march-armv2s.d: Likewise. * testsuite/gas/arm/attr-march-armv3.d: Likewise. * testsuite/gas/arm/attr-march-armv3m.d: Likewise. * testsuite/gas/arm/attr-march-armv4.d: Likewise. * testsuite/gas/arm/attr-march-armv4t.d: Likewise. * testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * testsuite/gas/arm/attr-march-armv5.d: Likewise. * testsuite/gas/arm/attr-march-armv5t.d: Likewise. * testsuite/gas/arm/attr-march-armv5te.d: Likewise. * testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6.d: Likewise. * testsuite/gas/arm/attr-march-armv6j.d: Likewise. * testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv6k.d: Likewise. * testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6kz.d: Likewise. * testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * testsuite/gas/arm/attr-march-armv6z.d: Likewise. * testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv7-m.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r.d: Likewise. * testsuite/gas/arm/attr-march-armv7.d: Likewise. * testsuite/gas/arm/attr-march-armv7a.d: Likewise. * testsuite/gas/arm/attr-march-armv7em.d: Likewise. * testsuite/gas/arm/attr-march-armv7m.d: Likewise. * testsuite/gas/arm/attr-march-armv7r.d: Likewise. * testsuite/gas/arm/attr-march-armv7ve.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.base.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/attr-march-xscale.d: Likewise. * testsuite/gas/arm/attr-mcpu.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * testsuite/gas/arm/attr-names.d: Likewise. * testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise. * testsuite/gas/arm/attr-order.d: Likewise. * testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-override-mcpu.d: Likewise. * testsuite/gas/arm/bl-local-2.d: Likewise. * testsuite/gas/arm/bl-local-v4t.d: Likewise. * testsuite/gas/arm/blx-local.d: Likewise. * testsuite/gas/arm/branch-reloc.d: Likewise. * testsuite/gas/arm/directives.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/mov-highregs-any.d: Likewise. * testsuite/gas/arm/mov-lowregs-any.d: Likewise. * testsuite/gas/arm/note-march-armv2.d: Likewise. * testsuite/gas/arm/note-march-armv2a.d: Likewise. * testsuite/gas/arm/note-march-armv3.d: Likewise. * testsuite/gas/arm/note-march-armv3m.d: Likewise. * testsuite/gas/arm/note-march-armv4.d: Likewise. * testsuite/gas/arm/note-march-armv4t.d: Likewise. * testsuite/gas/arm/note-march-armv5.d: Likewise. * testsuite/gas/arm/note-march-armv5t.d: Likewise. * testsuite/gas/arm/note-march-armv5te.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/note-march-xscale.d: Likewise. * testsuite/gas/arm/pr12198-1.d: Likewise. * testsuite/gas/arm/pr12198-2.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * config/te-nacl.h: Removed. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and and earmelfb_nacl.c. Remove NaCl dep files. * NEWS: Mention NaCl target support removal. * configure.tgt: Remove NaCl target support. * Makefile.in: Regenerated. * configure: Likewise. * po/BLD-POTFILES.in: Likewise. * emulparams/armelf_nacl.sh: Removed. * emulparams/armelfb_nacl.sh: Likewise. * emulparams/elf_nacl.sh: Likewise. * testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise. * testsuite/ld-arm/farcall-arm-nacl.d: Likewise. * testsuite/ld-arm/farcall-data-nacl.d: Likewise. * testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d: Adjusted. * testsuite/ld-arm/arm-elf.exp: Remove NaCl target support. * testsuite/ld-arm/cortex-a8-far.d: Likewise. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/build-id.exp: Likewise. * testsuite/ld-elf/ehdr_start-missing.d: Likewise. * testsuite/ld-elf/ehdr_start-shared.d: Likewise. * testsuite/ld-elf/ehdr_start-userdef.d: Likewise. * testsuite/ld-elf/ehdr_start-weak.d: Likewise. * testsuite/ld-elf/ehdr_start.d: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/export-class.exp: Likewise. * testsuite/ld-elf/fatal-warnings-1a.d: Likewise. * testsuite/ld-elf/fatal-warnings-1b.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/package-note.exp: Likewise. * testsuite/ld-elf/pr16322.d: Likewise. * testsuite/ld-elf/pr16498a.d: Likewise. * testsuite/ld-elf/pr16498b.d: Likewise. * testsuite/ld-elf/pr19162.d: Likewise. * testsuite/ld-elf/pr22269a.d: Likewise. * testsuite/ld-elf/pr22269b.d: Likewise. * testsuite/ld-elf/pr22393-1a.d: Likewise. * testsuite/ld-elf/pr22393-1b.d: Likewise. * testsuite/ld-elf/pr22393-1c.d: Likewise. * testsuite/ld-elf/pr22393-1d.d: Likewise. * testsuite/ld-elf/pr22393-1e.d: Likewise. * testsuite/ld-elf/pr22393-1f.d: Likewise. * testsuite/ld-elf/pr22393-2a.rd: Likewise. * testsuite/ld-elf/pr22393-2b.rd: Likewise. * testsuite/ld-elf/pr23900-1-32.rd: Likewise. * testsuite/ld-elf/pr23900-1-64.rd: Likewise. * testsuite/ld-elf/pr23900-1.d: Likewise. * testsuite/ld-elf/pr23900-2a.d: Likewise. * testsuite/ld-elf/pr23900-2b.d: Likewise. * testsuite/ld-elf/pr30508.d: Likewise. * testsuite/ld-elf/pr30907-1.d: Likewise. * testsuite/ld-elf/pr30907-2.d: Likewise. * testsuite/ld-elf/pr32341.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto-binutils.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-scripts/rgn-at3.d: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
AnthonyLatsis
added a commit
to bnbarham/swift
that referenced
this pull request
Jul 21, 2026
```
lib/Basic/Platform.cpp:235:22: error: no member named 'NaCl' in 'llvm::Triple'; did you mean 'NVCL'?
235 | case llvm::Triple::NaCl:
| ~~~~~~~~~~~~~~^~~~
| NVCL
lib/ClangImporter/ImportDecl.cpp:389:31: error: no member named 'PNaClABIBuiltinVaList' in 'clang::TargetInfo'
389 | case clang::TargetInfo::PNaClABIBuiltinVaList:
| ~~~~~~~~~~~~~~~~~~~^
```
See llvm/llvm-project@0d2e11f (llvm/llvm-project#133661).
Assisted-by: Claude Code
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Working on preparing a patch to remove the Native Client support now that it is finally reaching end of life.