[enghitalo]

	mut bench := benchmark.start()
	for i := 0; i < 1000000; i++ {
		add_vectors_mmx(&a[0], &b[0], &result[0])
	}

	bench.measure('MMX')

	for j := 0; j < 1000000; j++ {
		for i := 0; i < 8; i++ {
			result2[i] = a[i] + b[i]
		}
	}
	bench.measure('Normal')

 # TCC
 SPENT     9.536 ms in MMX
 SPENT    90.291 ms in Normal

 # GCC
 SPENT     0.233 ms in MMX
 SPENT     1.956 ms in Normal

_{Huly®: V_0.6-21094}

[enghitalo]

TCC (tcc version 0.9.27 (x86_64 Linux)) and Clang (Ubuntu clang version 18.1.3 (1)) is working well to me
v -cc tcc run examples/cpu_flags/SSE_and_MMX_Extensions/mmx.v
v -cc clang run examples/cpu_flags/SSE_and_MMX_Extensions/mmx.v

[spytheman]

Those examples of using specific CPU instructions, are not portable.
I also do not understand, what is the relation of them with cpu flags?

[KeitoTobi1]

Those examples of using specific CPU instructions, are not portable. I also do not understand, what is the relation of them with cpu flags?

I think this is an attempt to support different instruction sets that can be used for different CPUs, even for the same CPU.
In the case of amd64, there are sse, avx2, x87, mmx, and so on.
Perhaps you are referring to the SIMD instruction set.

[enghitalo]

Those examples of using specific CPU instructions, are not portable.
I also do not understand, what is the relation of them with cpu flags?

I will change it to cpu_features. When I run lscpu, the SIMD extensions (like SSE, AVX, or NEON) appear under the "Flags" section because lscpu lists all the features and capabilities supported by the CPU as "flags." In this context, the term "flag" is used to indicate available CPU features or instruction set extensions rather than the status bits (like Zero Flag or Carry Flag) used during program execution.

In lscpu output, these "flags" represent various supported capabilities of the processor, such as:

SIMD extensions (e.g., SSE, AVX): Indicate support for specific SIMD instruction sets.

Virtualization support (e.g., VT-x, AMD-V): Show if the CPU supports hardware virtualization.

Security features (e.g., NX, SMEP): Indicate protections like No-eXecute bit or Supervisor Mode Execution Protection.

[spytheman]

Note that the existing ASM example examples/asm.v, has all of the platform dependent assembly in a $if amd64 { block.

If I am on a new ARM based Mac, and try to do: v build-examples on master, that example will still compile, since the CPU dependent assembly, will be simply skipped.

This is not the case for the examples in this PR.

[spytheman]

Will you add the conditional checks, or should I just close the PR?

[enghitalo]

Will you add the conditional checks, or should I just close the PR?

I'll add it. Sorry for the delay, I got caught up in other projects. If anyone is interested in making these changes for me, I'd be very happy!!